LSI53CF92A LSI, LSI53CF92A Datasheet - Page 79

• Manufacturer Part Number: LSI53CF92A
• Manufacturer: LSI

Specifications of LSI53CF92A

• Lead Free Status / RoHS Status: Not Compliant

SCSI2
Standard Register Set
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
devices share the DMA request line (known as
wired-OR). When this bit is set, the FSC ignores any
activity on the DACK/ (DMA acknowledge) input.
When this bit is cleared, the DREQ output is driven to
TTL high or low voltages. When this bit is cleared, DACK/
is able to decrement the transfer counter and load or
unload the FIFO, depending on WR/ or RD/. DACK/
should not pulse true without RD/ or WR/ because the
transfer counter may decrement without transferring any
data. Refer to the
SCSI-2
Setting this bit allows the FSC to support two new
features adopted in SCSI-2: the 3-byte message
exchange for Tagged-Queuing and Group 2 commands.
Similar features also can be set independently in the
Configuration 3 (Config 3)
Tagged-Queuing
When this bit is set and the FSC is selected with ATN/
(Attention), it requests either one or three message bytes
depending on whether ATN/ remains true or goes false. If
ATN/ is still true after the first byte has been received, the
FSC may request two more message bytes before
switching to Command phase. If ATN/ goes false, it
switches to Command phase after the first message byte.
When the bit is not set, it requests a single message byte
(as a target) when selected with ATN/, and aborts the
selection sequence (as an initiator) if the target does not
switch to Command phase after one message byte has
been transferred. Refer to
Sequences,”
Group 2 Commands
When the SCSI-2 bit is set, Group 2 commands are
recognized as 10-byte commands. Receiving a Group 2
command with this bit set sets the Valid Group Code bit
in the
treats Group 2 commands as reserved commands, it
requests only six bytes in Command phase, and does not
set the Valid Group Code status bit.
Status
on
register. If the SCSI-2 bit is not set, the FSC
page 2-3
Transfer Counter
for details.
Section 2.2, “Bus-Initiated
register.
register description.
4-29
3