S71PL064JB0BFW0B0 Spansion Inc., S71PL064JB0BFW0B0 Datasheet - Page 124

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S71PL064JB0BFW0B0

Manufacturer Part Number
S71PL064JB0BFW0B0
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of S71PL064JB0BFW0B0

Operating Supply Voltage (max)
3.1V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Notes:
1. Stresses greater than listed under
2. All voltages are reference to GND.
3. I
4. I
5. AC measurements are assumed t
6. Parameters t
7. Data cannot be retained at deep power-down stand-by mode.
8. If OE# is high during the write cycle, the outputs will remain at high impedance.
9. During the output state of I/O signals, input signals of reverse polarity must not be applied.
10. If CE1# or LB#/UB# goes LOW coincident with or after WE# goes LOW, the outputs will remain at high impedance.
11. If CE1# or LB#/UB# goes HIGH coincident with or before WE# goes HIGH, the outputs will remain at high impedance.
April 26, 2004 pSRAM_Type06_14_A0
reference levels.
DDO
DDO
Address
Address
depends on the cycle time.
depends on output loading. Specified values are defined with the output open condition.
Provisions of Address Skew
CE1#
WE#
CE1#
WE#
OD
Read
In case multiple invalid address cycles shorter than t
an active status, at least one valid address cycle over t
10µs.
Write
In case multiple invalid address cycles shorter than t
an active status, at least one valid address cycle over t
10 µs.
, t
ODO
, t
BD
and t
OD
R
W define the time at which the output goes the open condition and are not output voltage
, t
"Absolute Maximum
F
P r e l i m i n a r y
= 5 ns.
Figure 50. Write
Figure 49. Read
pSRAM Type 6
Ratings" section may cause permanent damage to the device.
over 10 µ s
WC
RC
t
t
t
RC
WP
WC
WC
min sustain over 10 µs in
RC
min sustain over 10 µs in
min
min
min
min is required during
min is required during
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