82V1074PF IDT, Integrated Device Technology Inc, 82V1074PF Datasheet - Page 81

• Manufacturer Part Number: 82V1074PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V1074PF

• Number Of Channels: 4
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TQFP
• Operating Temperature Classification: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Operating Current: 95mA
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Lead Free Status / RoHS Status: Not Compliant

RSLIC & CODEC CHIPSET
LREG20: RSLIC IO Direction Configuration and IO Status Register, Read/Write (13H/93H)
LREG21: Interrupt Source Register, Read Only (14H)
IO_C[3:0]
IO[3:0]
Once the IOn pin is configured as an input, each change of the corresponding IO[n] bit will generate an interrupt if the mask bit IO_M[n]
in LREG19 is set to 0. A read command to this register will clear the interrupt caused by changes of the IO[3:0] bits.
FEED_I
FEED_V
FEED_R
Command
Command
I/O data
I/O data
FEED_I
IO_C[3]
RSLIC IO direction configuration. The IO_C[3:0] bits determine the directions of the IO4 to IO1 pins, respectively.
IO_C[3] = 0:
IO_C[3] = 1:
IO_C[2] = 0:
IO_C[2] = 1:
IO_C[1] = 0:
IO_C[1] = 1:
IO_C[0] = 0:
IO_C[0] = 1:
IO pin status (when the corresponding IO pin is configured as an input) or IO control data (when the corresponding IO
pin is configured as an output)
IO[3] = 0:
IO[3] = 1:
IO[2] = 0:
IO[2] = 1:
IO[1] = 0:
IO[1] = 1:
IO[0] = 0:
IO[0] = 1:
DC feeding characteristic indication bit for the constant current zone.
Whenever the DC feeding is operated at the constant zone, the FEED_I is set to 1, otherwise it is set to 0.
DC feeding characteristic indication bit for the constant voltage zone.
Whenever the DC feeding is operated at the constant voltage zone, the FEED_V bit it is set to 1, otherwise it is set to 0.
DC feeding characteristic indication bit for the resistive zone.
Whenever the DC feeding is operated at the resistive zone, the FEED_R bit is set to 1, otherwise it is set to 0.
R/W
b7
b7
0
FEED_V
IO_C[2]
b6
b6
0
0
The IO4 pin of the specified channel is configured as an input (default);
The IO4 pin of the specified channel is configured as an output.
The IO3 pin of the specified channel is configured as an input (default);
The IO3 pin of the specified channel is configured as an output.
The IO2 pin of the specified channel is configured as an input (default);
The IO2 pin of the specified channel is configured as an output.
The IO1 pin of the specified channel is configured as an input (default);
The IO1 pin of the specified channel is configured as an output.
The IO4 pin of the specified channel is in logic low state (when configured as an input) or it is set to
logic low (when configured as an output);
The IO4 pin of the specified channel is in logic high state (when configured as an input) or it is set to
logic high (when configured as an output);
The IO3 pin of the specified channel is in logic low state (when configured as an input) or it is set to
logic low (when configured as an output);
The IO3 pin of the specified channel is in logic high state (when configured as an input) or it is set to
logic high (when configured as an output);
The IO2 pin of the specified channel is in logic low state (when configured as an input) or it is set to
logic low (when configured as an output);
The IO2 pin of the specified channel is in logic high state (when configured as an input) or it is set to
logic high (when configured as an output);
The IO1 pin of the specified channel is in logic low state (when configured as an input) or it is set to
logic low (when configured as an output);
The IO1 pin of the specified channel is in logic high state (when configured as an input) or it is set to
logic high (when configured as an output);
FEED_R
IO_C[1]
b5
b5
0
0
IO_C[0]
LM_OK
81
b4
b4
1
1
UTD_OK
IO[3]
b3
b3
0
0
OTMP
IO[2]
b2
b2
0
1
IDT82V1671/IDT82V1671A, IDT82V1074
RAMP_OK
IO[1]
b1
b1
1
0
GK_POL
IO[0]
b0
b0
1
0