82V1074PF IDT, Integrated Device Technology Inc, 82V1074PF Datasheet - Page 44

• Manufacturer Part Number: 82V1074PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V1074PF

• Number Of Channels: 4
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TQFP
• Operating Temperature Classification: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Operating Current: 95mA
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Lead Free Status / RoHS Status: Not Compliant

level meter.
Table - 17 Registers and Coe-RAM Locations Used for the Level Meter
Level meter channel selection
Level meter source selection
Level meter shift factor selection K[3:0] bits in LREG9
Level meter count number
(integration time) selection
Level meter result
Level meter threshold
Level meter bandpass/notch
filter configuration
Level meter bandpass/notch
filter coefficient selection
LM Bandpass Filter Coefficient LM Bandpass Filter Coefficient in the Coe-RAM When LM_B = 1, this coefficient will be selected for the bandpass filter.
LM Notch Filter Coefficient
Level meter enable
Indication of Level meter
measurement completed
Level meter gain filter
configuration
Level meter rectifier enable
Level meter integrator work
mode
Offset Register in the level
meter
RSLIC & CODEC CHIPSET
Table - 17
Parameter
sums up the registers and Coe-RAM locations used for the
LM_CS[1:0] bits in GREG16
LM_SRC and DC_SRC bits in LREG8
LM_SEL[3:0] bits in LREG9
LM_CN[10:0] bits in GREG15 & GREG16
LMRL[7:0] bits in GREG17 (low byte)
LMRH[7:0] bits in GREG18 (high byte)
Threshold selection: LM_TH[2:0] bits in LREG10
Over threshold indication: OTHRE bit in LREG10
LM_FILT and LM_NOTCH bits in LREG8
LM_B and LM_N bits in LREG5
LM Notch Filter Coefficient in the Coe-RAM
LM_EN bit in GREG16
LM_OK bit in LREG21
LM_GF bit in LREG10
LM_RECT bit in LREG10
LM_ONCE bit in GREG16
DC_OFT bit in LREG4
word DC Offset in the Coe-RAM
Register Bits/Coe-RAM Words
44
The LM_CS[1:0] bits determine the signal from which channel to be level
metered.
Refer to
Refer to
The LM_CN[10:0] bits is programmable from 0 to 7FFH, corresponding to the
integration time of 0.125 ms to 255.875 ms.
See
Refer to
is exceeded, the OTHRE bit will be set to 1.
LM_FILT = 0: bandpass/notch filter is disabled;
LM_FILT = 1: bandpass/notch filter is enabled;
LM_NOTCH = 0: notch filter characteristic is selected;
LM_NOTCH = 1: bandpass filter characteristic is selected.
LM_B = 0: The coefficient in the Coe-RAM is selected for the bandpass filter;
LM_B = 1: The coefficient in the ROM is selected for the bandpass filter (default);
LM_N = 0: The coefficient in the Coe-RAM is selected for the notch filter;
LM_N = 1: The coefficient in the ROM is selected for the notch filter (default).
When LM_N = 1, this coefficient will be selected for the notch filter.
A logic high in this bit starts a level meter measurement while a logic low stops
the measurement.
Once the measurement is finished, the LM_OK bit will be set to 1.
This bit selects a gain factor of 1 or 16 for the level meter gain filter.
This bit is used to enable or disable the level meter rectifier as required.
This bit determines whether the integrator works once or continuously.
DC_OFT = 0: The compensation value in the Coe-RAM is selected for the Offset
Register;
DC_OFT = 1: The default compensation value of 0 is selected for the Offset
Register.
Table - 14
Table - 16
Table - 13
Table - 15
for details.
for details on threshold selection. Once the selected threshold
for details.
for details.
IDT82V1671/IDT82V1671A, IDT82V1074
Notes