PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 37

• Manufacturer Part Number: PN5120A0HN1/C1
• Description: RF Wireless Misc COMBO ANALOG/DIGI IC
• Manufacturer: NXP Semiconductors
• Type: Transmission Moduler

Specifications of PN5120A0HN1/C1

• Package / Case: HVQFN EP
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 30 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PN5120A0HN1/C1,157

NXP Semiconductors
111334
Product data sheet
8.2.2.13 MifNFCReg
Defines ISO/IEC 14443A/MIFARE/NFC specific settings in target or Card Operating
mode.
Table 61.
Table 62.
Bit
7 to 5
4 to 3
2
1 to 0
Access
Rights
Symbol
SensMiller
TauMiller
MFHalted
TxWait
MifNFCReg register (address 1Ch); reset value: 62h, 01100010b
Description of MifNFCReg bits
r/w
7
SensMiller
Rev. 3.4 — 8 September 2009
r/w
6
Description
These bits define the sensitivity of the Miller decoder.
These bits define the time constant of the Miller decoder.
Set to logic 1, this bit indicates that the PN512 is set to HALT mode in
Card Operation mode at 106 kbit. This bit is either set by the host
controller or by the internal state machine and indicates that only the
code 52h is accepted as a request command. This bit is cleared
automatically by a RF reset.
These bits define the additional response time for the target at 106 kbit
in Passive Communication mode and during the AutoColl command.
Per default 7 bits are added to the value of the register bit.
r/w
5
r/w
4
TauMiller
r/w
3
MFHalted
r/w
2
Transmission Module
© NXP B.V. 2010. All rights reserved.
r/w
1
PN512
TxWait
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r/w
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