AD7008JP50 Analog Devices Inc, AD7008JP50 Datasheet - Page 2

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AD7008JP50

Manufacturer Part Number
AD7008JP50
Description
IC CMOS DDS MODULATOR 44-PLCC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7008JP50

Rohs Status
RoHS non-compliant
Noise Floor
*
Voltage - Supply
5V
Package / Case
44-LCC

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AD7008–SPECIFICATIONS
Parameter
SIGNAL DAC SPECIFICATIONS
DDS SPECIFICATIONS
VOLTAGE REFERENCE
LOGIC INPUTS
POWER SUPPLIES
NOTES
1
2
3
4
5
Specifications subject to change without notice.
Operating temperature ranges as follows: A Version: –40 C to +85 C; J Version: 0 C to +70 C.
All dynamic specifications are measured using IOUT. 100% Production tested.
f
V
Do not allow reference current to cause power dissipation beyond the limit of I
CLK
REF
Resolution
Update Rate (f
IOUT Full Scale
Output Compliance
DC Accuracy
Update Rate (f
Dynamic Specifications
Internal Reference @ +25 C
Reference TC
V
V
V
I
C
V
I
I
I
INH
AA
DD
AA
REF
INH
INL
DD
IN
= 6.25 MHz, Frequency Word = 5671C71C HEX, f
Integral Nonlinearity
Differential Nonlinearity
Signal-to-Noise
Total Harmonic Distortion
Spurious Free Dynamic Range (SFDR)
f
Sleep = V
may be externally driven between 0 and V
CLK
, Input Capacitance
+ I
, Input Current
, Input Low Voltage
Wide Band ( 2 MHz)
Narrow Band ( 50 kHz)
, Input High Voltage
Overdrive
DD
= Max
DD
MAX
MAX
5
)
)
2
4
3
DD
.
V
Min
10
50
–55
–70
–55
1.2
0
4.75
DD
–0.9
OUT
AD7008AP20
= 2.11 MHz.
1
Typ
20
+1
1.27
300
2
26
22 + 1.5/MHz
80
1
(V
IOUT and IOUT, unless otherwise noted)
AA
= V
DD
Max
20
1
20
1.35
0.9
10
10
5.25
110
10
AA
= +5 V 5%; T
–2–
+ I
DD
shown above.
Min
10
50
–53
–70
–55
1.2
0
V
4.75
DD
–0.9
A
= T
AD7008JP50
MIN
Typ
20
+1
1.27
2
26
22 + 1.5/MHz
125
300
1
to T
MAX
, R
SET
= 390 , R
Max
50
1
50
1.35
0.9
10
10
5.25
160
20
LOAD
Units
Bits
MSPS
mA
Volts
LSB
LSB
MSPS
dB
dB
dBc
dBc
Volts
ppm/ C
V
Volts
Volts
pF
Volts
mA
mA
mA
mA
A
= 1
for
Test Conditions/
Comments
f
f
f
f
f
f
R
CLK
OUT
CLK
OUT
CLK
OUT
SET
= f
= f
= 6.25 MHz,
= 2 MHz
= 2 MHz
= 2.11 MHz
= 390
MAX
MAX
REV. B
,
,

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