AD7008JP50 Analog Devices Inc, AD7008JP50 Datasheet - Page 11

• Manufacturer Part Number: AD7008JP50
• Description: IC CMOS DDS MODULATOR 44-PLCC
• Manufacturer: Analog Devices Inc

Specifications of AD7008JP50

• Rohs Status: RoHS non-compliant
• Noise Floor: *
• Voltage - Supply: 5V
• Package / Case: 44-LCC

REV. B
cillator application is with the AD607 Monoceiver(tm). This
unique two chip combination provides a complete receiver sub-
system with digital frequency control, RSSI and demodulated
outputs for AM, FM and complex I/Q (SSB or QAM). (See
Figure 13.)
Direct Digital Modulator
In addition to the basic DDS function provided by the AD7008,
the device also offers several modulation capabilities useful in a
wide variety of application. The simplest modulation scheme is
frequency shift keying or FSK. In this application, each of the
two frequency registers is loaded with a different value, one rep-
resenting the space frequency and the other the mark frequency.
The digital data stream is fed to the FSELECT pin causing
the AD7008 to modulate the carrier frequency between the two
values.
The AD7008 has three registers that can be used for modula-
tion. Besides the example of frequency modulation shown
above, the frequency registers can be updated dynamically as
can the phase register and the IQMOD register. These can be
modulated at rates up to 16.5 MHz. The example shown below
along with code fragment shows how to implement the AD7008
in an amplitude modulation scheme. Other modulation
schemes can be implemented in a similar fashion.
{__________IRQ3 Interrupt Vector__________}
{in_audio is a port used to sample the audio
signal.
complement.
at an audio sample rate.
that the AD7008 has been set up with the Ampli-
tude Modulation Enabled.}
irq3_asserted:
{Get audio sample}
0
r6=dm(in_audio);
1
0
This signal is assumed to be twos
1
ADC
Figure 15. Amplitude Modulation
This interrupt should be serviced
Figure 14. FSK Modulator
0
INPUT TO
ANALOG
SCALE
SCALE
DSP:
FULL
0
F SELECT
FREQ 1
FREQ 0
REG
REG
SIN/COS
ROM
COS
SIN
10
32
32
This routine assumes
10
10
MUX
Q MOD
I MOD
10
10
32
10
10
CLOCK
ACCUMULATOR
AD7008
10
PHASE
10-BIT DAC
AD7008
32
IOUT
IOUT
–11–
{This section converts the twos complement au-
dio into offset binary scaled for modulating
the AD7008.
modulation scheme will instead be double side-
band, suppressed carrier.}
{Load parallel assembly register with modula-
tion data.
portion with scaled data}
{Transfer parallel assembly register to IQMOD
register}
Many applications require precise control of the output ampli-
tude, such as in local oscillators, signal generators and modula-
tors. There are several methods to control signal amplitude.
The most direct is to program the amplitude using the IQMOD
register on the AD7008. Other methods include selecting the
load resistor value or changing the value of R
tion is to place a voltage out DAC on the ground side of R
in Figure 16. This allows easy control of the output amplitude
without affecting other functions of the AD7008. Any combina-
tion of these techniques may be used as long as the full-scale
voltage developed across the load does not exceed 1 volt.
DMA02
DMA01
DMA00
DMWR
DMS1
r5 = 0x80000000;
r6 = r6 xor r5;
r6 = lshift r6 by -1;
r6 = r6 xor r5;
r4 = lshift r6 by -6;
r5 = 0x00000004;
dm(dds_para) = r5;
dm(dds_para) = r4;
r4 = 0xb0000000;
dm(dds_cont) = r4;
rti;
+5V
DMDXX–DATA BITS
DMAXX–ADDRESS BITS
6
4
5
3
2
1
14
+5V
V
7
V
EE
CC
OUT
G1
G2A
G2B
C
B
A
74HC138
U2
50MHz
K1115
Figure 16. External Gain Adjustment
U1
8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Q portion set to midscale, I
If twos complement is used, the
10
11
12
13
14
15
7
9
RESET
DMD24
DMD25
DMD26
DMD27
DMD28
DMD29
DMD30
DMD31
DMD32
DMD33
DMD34
DMD35
DMD36
DMD37
DMD38
DMD39
DMD36
DMD37
DMD38
DMD39
DMS3
19
20
21
22
23
24
25
26
10
11
12
13
14
15
16
27
32
33
34
35
36
41
42
31
30
38
37
8
9
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
WR
CS
TC0
TC1
TC2
TC3
LOAD
SCLK
SDATA
FSELECT
CLK
RESET
SLEEP
0 TO +1 VOLTS
Ifs = 6233 x (V
AD7008
VOLTAGE OUT DAC,
U3
FSADJUST
i.e., AD7245A
AGND
DGND
DGND
DGND
DGND
SET
COMP
TEST
IOUT
IOUT
V
R
V
V
V
V
REF
SET
AA
DD
DD
DD
AD7008
REF
. Another op-
1
4
3
17
28
39
44
7
18
29
43
40
6
5
2
–V
0.1µF
DAC
C1
49.9
R4
+5V
+5V
+5V
+5V
)
49.9
R5
390
R3
0.1µF
C2
SET
+5V
+5V
as