AD7008JP50 Analog Devices Inc, AD7008JP50 Datasheet - Page 14

• Manufacturer Part Number: AD7008JP50
• Description: IC CMOS DDS MODULATOR 44-PLCC
• Manufacturer: Analog Devices Inc

Specifications of AD7008JP50

• Rohs Status: RoHS non-compliant
• Noise Floor: *
• Voltage - Supply: 5V
• Package / Case: 44-LCC

AD7008–Typical Performance Characteristics
Figure 31. f
Figure 30. f
START 0 Hz
Figure 29. f
START 0 Hz
REF 5.0 dBm
10 dB/DIV
REF 5.0 dBm
10 dB/DIV
CENTER 13 100 000.0 Hz
REF 5.0 dBm
10 dB/DIV
RBW 3 kHz
RBW 3 kHz
RBW 3 kHz
CLK
CLK
CLK
= 50 MHz, f
= 50 MHz, f
RANGE 5.0 dBm
RANGE 5.0 dBm
RANGE 5.0 dBm
= 50 MHz, f
VBW 10 kHz
VBW 10 kHz
VBW 10 kHz
OUT
OFFSET 11 100 000.0 Hz
OUT
OFFSET 4 500 000.0 Hz
OUT
OFFSET 10 675 000.0 Hz
SPAN 25 000 000.0 Hz
STOP 25 000 000.0 Hz
= 11.1 MHz
STOP 25 000 000.0 Hz
= 13.1 MHz
= 9.1 MHz
–54.7 dB
–54.1 dB
–47.0 dB
ST 5.6 SEC
ST 5.6 SEC
ST 5.6 SEC
–14–
Figure 34. Typical Plot of SFDR vs. Master Clock Frequency
When f
Figure 33. Typical Current Consumption vs. Frequency
OUT
130
120
110
100
–40
–45
–50
–55
–60
–65
–70
–75
90
80
70
60
50
Figure 32. f
0
= 1/3f
0
CENTER 16 500 000.0 Hz
REF 5.0 dBm
10 dB/DIV
RBW 3 kHz
CLK
10
, Frequency Word = 5671C71C Hex
10
CLK
MASTER CLOCK – MHz
= 50 MHz, f
MASTER CLOCK – MHz
RANGE 5.0 dBm
20
20
VBW 10 kHz
OUT
30
30
OFFSET 500 000.0 Hz
= 16.5 MHz
SPAN 25 000 000.0 Hz
–44.8 dB
ST 5.6 SEC
40
40
REV. B
50
50