CP3BT10G38 National Semiconductor, CP3BT10G38 Datasheet - Page 152

• Manufacturer Part Number: CP3BT10G38
• Description: IC CPU RISC W/LLC&USB 100-LQFP
• Manufacturer: National Semiconductor

Specifications of CP3BT10G38

• Applications: Connectivity Processor
• Core Processor: CR16C
• Program Memory Type: FLASH (256 kB)
• Controller Series: CP3000
• Ram Size: 10K x 8
• Interface: Bluetooth, ACCESS.bus, Audio, UART, USB, Microwire/SPI
• Number Of I /o: 37
• Voltage - Supply: 2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *CP3BT10G38

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24.0 Versatile Timer Unit (VTU)
The VTU contains four fully independent 16-bit timer sub-
systems. Each timer subsystem can operate either as dual
8-bit PWM timers, as a single 16-bit PWM timer, or as a 16-
bit counter with 2 input capture channels. These timer sub-
systems offers an 8-bit clock prescaler to accommodate a
wide range of system frequencies.
The VTU offers the following features:
The VTU can be configured to provide:
— Eight fully independent 8-bit PWM channels
— Four fully independent 16-bit PWM channels
— Eight 16-bit input capture channels
The VTU consists of four timer subsystems, each of
which contains:
— A 16-bit counter
— Two 16-bit capture / compare registers
— An 8-bit fully programmable clock prescaler
Each of the four timer subsystems can operate in the fol-
lowing modes:
— Low power mode, i.e. all clocks are stopped
— Dual 8-bit PWM mode
— 16-bit PWM mode
— Dual 16-bit input capture mode
15
7
I/O Control
C1 PRSC
Prescaler
Counter
Timer Subsystem 1
TIO1
Compare
Compare
= =
PERCAP1
DTYCAP1
Count1
-
-
Capture
Capture
I/O Control
15
TIO2
0
MODE
Figure 66. Versatile Timer Unit Block Diagram
15
7
I/O Control
C2 PRSC
Prescaler
Counter
Timer Subsystem 2
0
TIO3
Compare
Compare
= =
PERCAP2
DTYCAP2
Count2
-
-
Capture
Capture
I/O Control
15
15
TIO4
0
INTPND
INTCTL
152
24.1
The VTU is comprised of four timer subsystems. Each timer
subsystem contains an 8-bit clock prescaler, a 16-bit up-
counter, and two 16-bit registers. Each timer subsystem
controls two I/O pins which either function as PWM outputs
or capture inputs depending on the mode of operation.
There are four system-level interrupt requests, one for each
timer subsystem. Each system-level interrupt request is
controlled by four interrupt pending bits with associated en-
able/disable bits. All four timer subsystems are fully inde-
pendent, and each may operate as a dual 8-bit PWM timer,
a 16-bit PWM timer, or as a dual 16-bit capture timer.
Figure 66 shows the main elements of the VTU.
The VTU controls a total of eight I/O pins, each of which
can function as either:
— PWM output with programmable output polarity
— Capture input with programmable event detection and
A flexible interrupt scheme with
— Four separate system level interrupt requests
— A total of 16 interrupt sources each with a separate in-
15
7
I/O Control
timer reset
terrupt pending bit and interrupt enable bit
C3 PRSC
Prescaler
Counter
Timer Subsystem 3
TIO5
Compare
Compare
0
0
= =
VTU FUNCTIONAL DESCRIPTION
PERCAP3
DTYCAP3
Count3
-
-
Capture
Capture
I/O Control
15
15
TIO6
0
IO1CTL
IO2CTL
15
7
I/O Control
Prescaler
C4RSC
Counter
Timer Subsystem 4
TIO7
Compare
Compare
= =
0
0
PERCAP4
DTYCAP4
Count4
-
-
Capture
Capture
I/O Control
TIO8
0
DS088