CY7C0851AV-133AXI Cypress Semiconductor Corp, CY7C0851AV-133AXI Datasheet - Page 26

• Manufacturer Part Number: CY7C0851AV-133AXI
• Description: CY7C0851AV-133AXI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C0851AV-133AXI

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 2M (64K x 36)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Notes
Document #: 38-06070 Rev. *J
49. CE
50. This timing is valid when one port is writing, and other port is reading the same location at the same time. If t
51. If t
> minimum specified value, then R_Port is Read the most recent data (written by L_Port) (t
CLK
L_PORT
ADDRESS
R/W
L_PORT
DATA
CLK
R_PORT
ADDRESS
R/W
R_PORT
DATA
CCS
0
= OE = ADS = CNTEN = B0 – B3 = LOW; CE
L
L
R
R
< minimum specified value, then R_Port is Read the most recent data (written by L_Port) only (2 * t
IN
OUT
t
CKHZ
t
CH2
t
t
CH2
CYC2
Figure 21. Left_Port (L_Port) Write to Right_Port (R_Port) Read
t
t
CYC2
CL2
t
SW
(continued)
t
t
SD
SA
t
CL2
D
A
n
n
1
t
HA
= CNTRST = MRST = CNT/MSK = HIGH.
t
CCS
t
SA
t
HW
t
HD
A
n
t
HA
CY7C0850AV,CY7C0851V/CY7C0851AV
t
CKLZ
t
CYC2
DC
t
CD2
+ t
CD2
) after the rising edge of R_Port's clock.
CYC2
CCS
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
Q
+ t
n
is violated, indeterminate data is Read out.
CD2
) after the rising edge of R_Port's clock. If t
[49, 50, 51]
Page 26 of 36
CCS
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