PIC18LF4221-I/ML Microchip Technology, PIC18LF4221-I/ML Datasheet - Page 266

4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE

PIC18LF4221-I/ML

Manufacturer Part Number
PIC18LF4221-I/ML
Description
4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4221-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC18F2221/2321/4221/4321 FAMILY
REGISTER 24-8:
REGISTER 24-9:
DS39689F-page 266
bit 7-2
bit 1
bit 0
bit 7
bit 6
bit 5
bit 4-0
CONFIG6L: CONFIGURATION REGISTER 6 LOW (BYTE ADDRESS 30000Ah)
CONFIG6H: CONFIGURATION REGISTER 6 HIGH (BYTE ADDRESS 30000Bh)
bit 7
Unimplemented: Read as ‘0’
WRT1: Write Protection bit
1 = Block 1 not write-protected
0 = Block 1 write-protected
WRT0: Write Protection bit
1 = Block 0 not write-protected
0 = Block 0 write-protected
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
WRTD: Data EEPROM Write Protection bit
1 = Data EEPROM not write-protected
0 = Data EEPROM write-protected
WRTB: Boot Block Write Protection bit
1 = Boot block not write-protected
0 = Boot block write-protected
WRTC: Configuration Register Write Protection bit
1 = Configuration registers (300000-3000FFh) not write-protected
0 = Configuration registers (300000-3000FFh) write-protected
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value when device is unprogrammed
WRTD
Note 1: See Figure 24-5 for variable block boundaries.
R/C-1
Note 1: This bit is read-only in normal execution mode; it can be written only in Program mode.
U-0
2: See Figure 24-5 for block boundaries.
WRTB
R/C-1
U-0
WRTC
C = Clearable bit
C = Clearable bit
(1)
(1)
R-1
U-0
(2)
(1)
(1)
(1)
(2)
U-0
U-0
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
(1)
U-0
U-0
U-0
U-0
© 2009 Microchip Technology Inc.
WRT1
R/C-1
U-0
WRT0
R/C-1
U-0
bit 0
bit 0

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