PIC18LF4221-I/ML Microchip Technology, PIC18LF4221-I/ML Datasheet - Page 256

4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE

PIC18LF4221-I/ML

Manufacturer Part Number
PIC18LF4221-I/ML
Description
4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4221-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC18F2221/2321/4221/4321 FAMILY
FIGURE 23-3:
23.5
In many applications, the ability to detect a drop below
or rise above a particular threshold is desirable. For
example, the HLVD module could be periodically
enabled to detect a Universal Serial Bus (USB) attach
or detach. This assumes the device is powered by a
lower voltage source than the USB when detached. An
attach would indicate a high-voltage detect from, for
example, 3.3V to 5V (the voltage on USB) and vice
versa for a detach. This feature could save a design a
few extra components and an attach signal (input pin).
For general battery applications, Figure 23-4 shows a
possible voltage curve. Over time, the device voltage
decreases. When the device voltage reaches voltage
V
The interrupt could cause the execution of an ISR,
which would allow the application to perform “house-
keeping tasks” and perform a controlled shutdown
before the device voltage exits the valid operating
range at T
tion a time window, represented by the difference
between T
DS39689F-page 256
A
, the HLVD logic generates an interrupt at time T
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
Applications
A
B
. The HLVD, thus, would give the applica-
and T
HLVDIF
HLVDIF
IRVST
IRVST
V
V
B
DD
DD
, to safely exit.
HIGH-VOLTAGE DETECT OPERATION (VDIRMAG = 1)
HLVDIF may not be set
Internal Reference is stable
Internal Reference is stable
T
T
IRVST
IRVST
A
.
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
FIGURE 23-4:
V
V
A
B
Legend:
HLVDIF cleared in software
V
V
A
B
= HLVD trip point
= Minimum valid device
TYPICAL LOW-VOLTAGE
DETECT APPLICATION
© 2009 Microchip Technology Inc.
operating voltage
Time
HLVDIF cleared in software
T
A
V
V
LVD
LVD
T
B

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