PIC18LF4221-I/ML Microchip Technology, PIC18LF4221-I/ML Datasheet - Page 244

4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE

PIC18LF4221-I/ML

Manufacturer Part Number
PIC18LF4221-I/ML
Description
4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4221-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
register are used to select these modes. The TRISA reg-
PIC18F2221/2321/4221/4321 FAMILY
21.1
There are eight modes of operation for the comparators,
shown in Figure 21-1. Bits CM<2:0> of the CMCON
ister controls the data direction of the comparator pins
for each mode. If the Comparator mode is changed, the
FIGURE 21-1:
DS39689F-page 244
Comparators Reset
CM<2:0> = 000
Two Independent Comparators
CM<2:0> = 010
Two Common Reference Comparators
CM<2:0> = 100
One Independent Comparator with Output
CM<2:0> = 001
A = Analog Input, port reads zeros always
* Setting the TRISA<5:4> bits will disable the comparator outputs by configuring the pins as inputs.
RA4/T0CKI/C1OUT*
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
REF
REF
REF
REF
REF
REF
REF
REF
+
-/CV
+
-/CV
+
-/CV
+
-/CV
Comparator Configuration
REF
REF
REF
REF
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off (Read as ‘0’)
Off (Read as ‘0’)
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off (Read as ‘0’)
D = Digital Input
Two Common Reference Comparators with Outputs
CM<2:0> = 101
Two Independent Comparators with Outputs
CM<2:0> = 011
Comparators Off (POR Default Value)
CM<2:0> = 111
Four Inputs Multiplexed to Two Comparators
CM<2:0> = 110
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA4/T0CKI/C1OUT*
RA1/AN1
RA2/AN2/
V
RA5/AN4/SS/HLVDIN/C2OUT*
RA0/AN0
RA3/AN3/
V
RA4/T0CKI/C1OUT*
RA1/AN1
RA2/AN2/
V
RA5/AN4/SS/HLVDIN/C2OUT*
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
REF
REF
REF
REF
REF
REF
REF
REF
specified mode change delay shown in Section 27.0
comparator output level may not be valid for the
“Electrical Characteristics”.
Note:
CIS (CMCON<3>) is the Comparator Input Switch
+
-/CV
+
-/CV
+
-/CV
+
-/CV
REF
REF
REF
REF
A
A
A
A
D
D
D
D
A
A
A
A
A
A
A
D
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
© 2009 Microchip Technology Inc.
C1
C2
C1
C2
C1
C2
V
V
V
V
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
Off (Read as ‘0’)
Off (Read as ‘0’)
C1
C2
C1OUT
C2OUT
From V
REF
C1OUT
C2OUT
Module

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