PIC18F46K20-E/P Microchip Technology, PIC18F46K20-E/P Datasheet - Page 398

• Manufacturer Part Number: PIC18F46K20-E/P
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, DIP-40
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K20-E/P

• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3936Byte
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 32768 Words
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
• Lead Free Status / Rohs Status: Details

PIC18F2XK20/4XK20
FIGURE 26-18:
TABLE 26-20: MASTER SSP I
FIGURE 26-19:
DS41303G-page 398
90
91
92
93
Note 1: Maximum pin capacitance = 10 pF for all I
Param.
No.
SCL
SDA
Note:
T
T
T
T
Symbol
SU
SU
HD
HD
Refer to Figure 26-4 for load conditions.
:
:
:
:
STA
STO
SDA
Out
SDA
In
Note:
STA
STO
SCL
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
90
Refer to Figure 26-4 for load conditions.
MASTER SSP I
MASTER SSP I
Condition
Start
90
103
Characteristic
91
91
2
109
C™ BUS START/STOP BITS REQUIREMENTS
1 MHz mode
400 kHz mode
1 MHz mode
100 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
2
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
2
1 MHz mode
C™ BUS START/STOP BITS TIMING WAVEFORMS
C™ BUS DATA TIMING
100
106
2
(1)
(1)
(1)
C pins.
(1)
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
101
109
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
Min
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
107
Max
—
—
—
—
—
—
—
—
—
—
—
—
92
 2010 Microchip Technology Inc.
92
Units
Condition
ns
ns
ns
ns
102
Stop
110
Only relevant for
Repeated Start
condition
After this period, the
first clock pulse is
generated
93
Conditions