PIC18F46K20-E/P Microchip Technology, PIC18F46K20-E/P Datasheet - Page 100

• Manufacturer Part Number: PIC18F46K20-E/P
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, DIP-40
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K20-E/P

• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3936Byte
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 32768 Words
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
• Lead Free Status / Rohs Status: Details

PIC18F2XK20/4XK20
REGISTER 7-1:
DS41303G-page 100
bit 7
Legend:
R = Readable bit
S = Bit can be set by software, but not cleared
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
EEPGD
R/W-x
When a WRERR occurs, the EEPGD and CFGS bits are not cleared. This allows tracing of the
error condition.
EEPGD: Flash Program or Data EEPROM Memory Select bit
1 = Access Flash program memory
0 = Access data EEPROM memory
CFGS: Flash Program/Data EEPROM or Configuration Select bit
1 = Access Configuration registers
0 = Access Flash program or data EEPROM memory
Unimplemented: Read as ‘0’
FREE: Flash Row (Block) Erase Enable bit
1 = Erase the program memory block addressed by TBLPTR on the next WR command
0 = Perform write-only
WRERR: Flash Program/Data EEPROM Error Flag bit
1 = A write operation is prematurely terminated (any Reset during self-timed programming in normal
0 = The write operation completed
WREN: Flash Program/Data EEPROM Write Enable bit
1 = Allows write cycles to Flash program/data EEPROM
0 = Inhibits write cycles to Flash program/data EEPROM
WR: Write Control bit
1 = Initiates a data EEPROM erase/write cycle or a program memory erase cycle or write cycle.
0 = Write cycle to the EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read (Read takes one cycle. RD is cleared by hardware. The RD bit can only
0 = Does not initiate an EEPROM read
R/W-x
CFGS
(cleared by completion of erase operation)
operation, or an improper write attempt)
(The operation is self-timed and the bit is cleared by hardware once write is complete.
The WR bit can only be set (not cleared) by software.)
be set (not cleared) by software. RD bit cannot be set when EEPGD = 1 or CFGS = 1.)
EECON1: DATA EEPROM CONTROL 1 REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
R/W-0
FREE
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WRERR
R/W-x
(1)
WREN
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
R/S-0
WR
R/S-0
RD
bit 0