MAX1441GUP/V+ Maxim Integrated Products, MAX1441GUP/V+ Datasheet - Page 34

• Manufacturer Part Number: MAX1441GUP/V+
• Description: Touch Screen Converters & Controllers PROXIMITY SENSR el Proximity and Tou
• Manufacturer: Maxim Integrated Products

Specifications of MAX1441GUP/V+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Automotive, Two-Channel Proximity and
Touch Sensor
Note 4: The active accumulator (Acc) is not allowed as the src in operations where it is the implicit destination.
Note 5: Bit operation. Potentially affects C or E if the PSF register is the destination. Potentially affects S and/or Z if AP or APC is
Note 6: The ‘{L/S}’ prefix is optional.
Note 7: Instructions that attempt to simultaneously push/pop the stack (e.g., PUSH @SP--, PUSH @SPI--, POP @++SP, POPI
Note 8: Special cases: If ‘MOVE APC, Acc’ sets the APC.CLR bit, AP is cleared, overriding any auto-inc/dec/modulo
Table 12. MAXQ Family Instruction Set Summary (continued)
34
{L/S}JUMP src
{L/S}JUMP C, src
{L/S}JUMP NC, src
{L/S}JUMP Z, src
{L/S}JUMP NZ, src
{L/S}JUMP E, src
{L/S}JUMP NE, src
{L/S}JUMP S, src
{L/S}DJNZ LC[n], src If --LC[n] <> 0, IP § (IP + src) or src
{L/S}CALL src
RET
RET C
RET NC
RET Z
RET NZ
RET S
RETI
RETI C
RETI NC
RETI Z
RETI NZ
RETI S
XCH (MAXQ20 only) Swap Acc bytes
XCHN
MOVE dst, src
PUSH src
POP dst
POPI dst
CMP src
NOP
the destination.
@++SP) or modify SP in a conflicting manner (e.g., MOVE SP, @SP--) are invalid.
operation specified for AP. If ‘MOVE AP, Acc’ causes an auto-inc/dec/modulo operation on AP, this overrides the
specified data transfer (i.e., Acc is not transferred to AP).
MNEMONIC
IP § IP + src or src
If C=1, IP § (IP + src) or src
If C=0, IP § (IP + src) or src
If Z=1, IP § (IP + src) or src
If Z=0, IP § (IP + src) or src
If E=1, IP § (IP + src) or src
If E=0, IP § (IP + src) or src
If S=1, IP § (IP + src) or src
@++SP § IP+1; IP § (IP+src) or src
IP § @SP--
If C=1, IP § @SP--
If C=0, IP § @SP--
If Z=1, IP § @SP--
If Z=0, IP § @SP--
If S=1, IP § @SP--
IP § @SP--; INS § 0
If C=1, IP § @SP--; INS § 0
If C=0, IP § @SP--; INS § 0
If Z=1, IP § @SP--; INS § 0
If Z=0, IP § @SP--; INS § 0
If S=1, IP § @SP--; INS § 0
Swap nibbles in each Acc byte
dst § src
@++SP § src
dst § @SP--
dst § @SP--; INS § 0
E § (Acc = src)
No operation
DESCRIPTION
16-BIT INSTRUCTION
1000 1100 0000 1101
1010 1100 0000 1101
1110 1100 0000 1101
1001 1100 0000 1101
1101 1100 0000 1101
1100 1100 0000 1101
1000 1100 1000 1101
1010 1100 1000 1101
1110 1100 1000 1101
1001 1100 1000 1101
1101 1100 1000 1101
1100 1100 1000 1101
1000 1010 1000 1010
1000 1010 0111 1010
1ddd dddd 0000 1101
1ddd dddd 1000 1101
1101 1010 0011 1010
0011 1100 ssss ssss
0111 1100 ssss ssss
fddd dddd ssss ssss
f000 1100 ssss ssss
f010 1100 ssss ssss
f110 1100 ssss ssss
f001 1100 ssss ssss
f101 1100 ssss ssss
f100 1100 ssss ssss
f10n 1101 ssss ssss
f011 1101 ssss ssss
f000 1101 ssss ssss
f111 1000 ssss ssss
WORD
STATUS BITS
AFFECTED
C, S, Z, E
C, S, Z, E
C, S, Z, E
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S
S
E
INC/DEC
(Note 8)
AP
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Y
Y
NOTES
6, 7
7, 8
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6
6
6
6
6
6
6
6
6
7
7
7