PIC32MX575F512H-80I/PT Microchip Technology, PIC32MX575F512H-80I/PT Datasheet - Page 84

IC MCU 32BIT 512KB FLASH 64TQFP

PIC32MX575F512H-80I/PT

Manufacturer Part Number
PIC32MX575F512H-80I/PT
Description
IC MCU 32BIT 512KB FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX575F512H-80I/PT

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC32
No. Of I/o's
53
Ram Memory Size
64KB
Cpu Speed
80MHz
No. Of Timers
5
Digital Ic Case Style
TQFP
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX575F512H-80I/PT
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC32MX575F512H-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC32MX575F512H-80I/PT
Manufacturer:
MICROCHI
Quantity:
20 000
Part Number:
PIC32MX575F512H-80I/PT
0
TABLE 4-26:
TABLE 4-27:
Legend:
Note
Legend:
Note
60A0
60B0
6080
6090
60A0
60B0
6080
6090 PORTC
PORTC
TRISC
ODCC
1:
1:
TRISC
ODCC
LATC
LATC
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORT C REGISTER MAP FOR PIC32MX575F256H, PIC32MX575F512H, PIC32MX675F512H, PIC32MX695F512H, AND
PIC32MX795F512H DEVICES
PORT C REGISTER MAP FOR PIC32MX575F256L, PIC32MX575F512L, PIC32MX675F512L, PIC32MX695F512L, AND
PIC32MX795F512L DEVICES
TRISC15
ODCC15
LATC15
TRISC15
ODCC15
LATC15
31/15
RC15
31/15
RC15
TRISC14
ODCC14
TRISC14
LATC14
ODCC14
LATC14
30/14
RC14
30/14
RC14
TRISC13
ODCC13
TRISC13
ODCC13
LATC13
LATC13
29/13
RC13
29/13
RC13
TRISC12
ODCC12
TRISC12
ODCC12
LATC12
LATC12
28/12
RC12
28/12
RC12
(1)
(1)
27/11
27/11
26/10
26/10
25/9
25/9
24/8
24/8
Bits
Bits
23/7
23/7
22/6
22/6
21/5
21/5
TRISC4
ODCC4
LATC4
20/4
RC4
20/4
TRISC3
ODCC3
LATC3
19/3
RC3
19/3
TRISC2
ODCC2
LATC2
18/2
RC2
18/2
TRISC1
ODCC1
LATC1
17/1
RC1
17/1
16/0
16/0
0000
F00F
0000
xxxx
0000
xxxx
0000
0000
0000
F000
0000
xxxx
0000
xxxx
0000
0000

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