PIC32MX575F512H-80I/PT Microchip Technology, PIC32MX575F512H-80I/PT Datasheet - Page 127

• Manufacturer Part Number: PIC32MX575F512H-80I/PT
• Description: IC MCU 32BIT 512KB FLASH 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX575F512H-80I/PT

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: CAN, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC32
• No. Of I/o's: 53
• Ram Memory Size: 64KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Digital Ic Case Style: TQFP
• Embedded Interface Type: CAN, I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

15.0
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The input capture module captures the 16-bit or 32-bit
value of the selected Time Base registers when an
event occurs at the ICx pin. The following events cause
capture events:
1.
FIGURE 15-1:
 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Simple Capture Event modes
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
input at ICx pin
input at ICx pin
2: Some registers and associated bits
INPUT CAPTURE
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 15. “Input
Capture” (DS61122) of the “PIC32MX
Family Reference Manual” , which is
available from the Microchip web site
(www.microchip.com/PIC32).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
ICM<2:0>
Prescaler
1, 4, 16
ICx Input
INPUT CAPTURE BLOCK DIAGRAM
ICM<2:0>
ICFEDGE
Edge Detect
ICxCON
FIFO Control
Preliminary
ICBNE
ICI<1:0>
ICOV
ICC32
ICTMR
PIC32MX5XX/6XX/7XX
Generation
2.
3.
4.
Each input capture channel can select between one of
two 16-bit timers (Timer2 or Timer3) for the time base,
or two 16-bit timers (Timer2 and Timer3) together to
form a 32-bit timer. The selected timer can use either
an internal or external clock.
Other operational features include:
• Device Wake-up from Capture Pin during CPU
• Interrupt on Input Capture Event
• 4-word FIFO Buffer for Capture Values
• Input Capture can also be used to provide
Interrupt
Interrupt
Event
Sleep and Idle modes
Interrupt optionally generated after 1, 2, 3 or 4
buffer locations are filled
additional sources of External Interrupts
ICxBUF<31:16>
Capture timer value on every edge (rising and
falling)
Capture timer value on every edge (rising and
falling), specified edge first.
Prescaler Capture Event modes
- Capture timer value on every 4th rising
- Capture timer value on every 16th rising
edge of input at ICx pin
edge of input at ICx pin
Data Space Interface
Peripheral Data Bus
ICxBUF<15:0>
Timer3
0
Timer2
1
DS61156B-page 127