PIC18F458-E/P Microchip Technology, PIC18F458-E/P Datasheet - Page 398

• Manufacturer Part Number: PIC18F458-E/P
• Description: IC MCU FLASH 16KX16 W/CAN 40 DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing Diagrams and Specifications................................. 343
TSTFSZ............................................................................. 321
TXSTA Register
DS41159E-page 396
PIC18FXX8
Transition from OSC1 to
USART Asynchronous Reception ............................. 192
USART Asynchronous Transmission........................ 190
USART Asynchronous Transmission
USART Synchronous Receive
USART Synchronous Reception
USART Synchronous Transmission ......................... 194
USART Synchronous Transmission
USART Synchronous Transmission
Wake-up from Sleep via Interrupt ............................. 275
A/D Conversion Requirements ................................. 359
A/D Converter Characteristics .................................. 358
Capture/Compare/PWM Requirements
CLKO and I/O Timing
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Slave Mode
External Clock Timing Requirements........................ 343
I
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements
PLL Clock.................................................................. 344
Reset, Watchdog Timer, Oscillator
Timer0 and Timer1 External
USART Synchronous Receive
USART Synchronous Transmission
BRGH Bit .................................................................. 185
2
2
C Bus Data Requirements
C Bus Start/Stop Bits Requirements
Timer1 Oscillator................................................. 21
(Back to Back)................................................... 190
(Master/Slave)................................................... 357
(Master Mode, SREN)....................................... 195
(Master/Slave)................................................... 357
(Through TXEN)................................................ 194
(CCP1 and ECCP1) .......................................... 347
Requirements.................................................... 344
(Master Mode, CKE = 0) ................................... 349
(Master Mode, CKE = 1) ................................... 350
(Slave Mode, CKE = 0) ..................................... 351
Requirements (CKE = 1)................................... 352
(Slave Mode)..................................................... 354
(Slave Mode)..................................................... 353
Requirements.................................................... 356
Requirements.................................................... 355
(PIC18F248 and PIC18F458) ........................... 348
Start-up Timer, Power-up Timer,
Brown-out Reset and Low-Voltage
Detect Requirements ........................................ 345
Clock Requirements.......................................... 346
Requirements.................................................... 357
Requirements.................................................... 357
2
2
C Bus Data
C Bus Start/Stop Bits
U
USART.............................................................................. 183
V
Voltage Reference Specifications..................................... 340
W
Wake-up from Sleep ................................................. 265, 274
Watchdog Timer (WDT)............................................ 265, 272
WCOL ....................................................... 171, 172, 173, 176
WCOL Status Flag.................................... 171, 172, 173, 176
WDT. See Watchdog Timer.
WWW, On-Line Support ....................................................... 5
X
XORLW............................................................................. 321
XORWF ............................................................................ 322
Asynchronous Mode ................................................. 189
Asynchronous Reception.......................................... 192
Asynchronous Transmission
Baud Rate Generator (BRG) .................................... 185
Serial Port Enable (SPEN) Bit .................................. 183
Synchronous Master Mode....................................... 193
Synchronous Master Reception
Synchronous Master Transmission
Synchronous Slave Mode......................................... 196
Synchronous Slave Reception.................................. 197
Synchronous Slave Transmission
Using Interrupts ........................................................ 274
Associated Registers ................................................ 273
Control Register........................................................ 272
Postscaler ................................................................. 273
Programming Considerations ................................... 272
RC Oscillator............................................................. 272
Time-out Period ........................................................ 272
Reception ......................................................... 191
Setting Up 9-Bit Mode with
Transmission .................................................... 189
Associated Registers........................................ 190
Associated Registers........................................ 185
Baud Rate Error, Calculating............................ 185
Baud Rate Formula .......................................... 185
Baud Rates for Asynchronous Mode
Baud Rates for Asynchronous Mode
Baud Rates for Synchronous Mode.................. 186
High Baud Rate Select (BRGH Bit) .................. 185
Sampling........................................................... 185
Reception ......................................................... 195
Transmission .................................................... 193
Associated Registers........................................ 195
Associated Registers........................................ 193
Reception ......................................................... 196
Transmission .................................................... 196
Associated Registers........................................ 197
Address Detect ......................................... 191
(BRGH = 0)............................................... 187
(BRGH = 1)............................................... 188
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