PIC18F458-E/P Microchip Technology, PIC18F458-E/P Datasheet - Page 267

• Manufacturer Part Number: PIC18F458-E/P
• Description: IC MCU FLASH 16KX16 W/CAN 40 DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.0
There are several features intended to maximize
system reliability, minimize cost through elimination of
external components, provide power-saving operating
modes and offer code protection. These are:
• Oscillator Selection
• Reset
• Interrupts
• Watchdog Timer (WDT)
• Sleep
• Code Protection
• ID Locations
• In-Circuit Serial Programming
All PIC18FXX8 devices have a Watchdog Timer which
is permanently enabled via the configuration bits or
software controlled. It runs off its own RC oscillator for
added reliability. There are two timers that offer
necessary delays on power-up. One is the Oscillator
Start-up Timer (OST), intended to keep the chip in
Reset until the crystal oscillator is stable. The other is
the Power-up Timer (PWRT) which provides a fixed
delay on power-up only, designed to keep the part in
Reset while the power supply stabilizes. With these two
timers on-chip, most applications need no external
Reset circuitry.
TABLE 24-1:
© 2006 Microchip Technology Inc.
300001h
300002h
300003h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh
3FFFFFh
Legend:
Note
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
File Name
1:
SPECIAL FEATURES OF
THE CPU
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG4L
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
DEVID1
DEVID2
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
See Register 24-11 for DEVID1 values.
CONFIGURATION BITS AND DEVICE IDS
DEBUG
DEV10
WRTD
DEV2
Bit 7
CPD
—
—
—
—
—
—
—
EBTRB
WRTB
DEV1
DEV9
Bit 6
CPB
—
—
—
—
—
—
—
OSCSEN
WRTC
DEV0
DEV8
Bit 5
—
—
—
—
—
—
—
—
REV4
DEV7
Bit 4
—
—
—
—
—
—
—
—
—
—
WDTPS2
BORV1
EBTR3
WRT3
Sleep mode is designed to offer a very Low-Current
Power-Down mode. The user can wake-up from Sleep
through external Reset, Watchdog Timer wake-up or
through an interrupt. Several oscillator options are also
made available to allow the part to fit the application.
The RC oscillator option saves system cost while the
LP crystal option saves power. A set of configuration
bits is used to select various options.
24.1
The configuration bits can be programmed (read as ‘0’)
or left unprogrammed (read as ‘1’), to select various
device configurations. These bits are mapped starting
at program memory location 300000h.
The user will note that address 300000h is beyond the
user program memory space. In fact, it belongs to the
configuration memory space (300000h-3FFFFFh)
which can only be accessed using table reads and
table writes.
Programming the Configuration registers is done in a
manner similar to programming the Flash memory. The
EECON1 register WR bit starts a self-timed write to the
Configuration register. In normal operation mode, a
TBLWT instruction, with the TBLPTR pointed to the
Configuration register, sets up the address and the
data for the Configuration register write. Setting the WR
bit starts a long write to the Configuration register. The
Configuration registers are written a byte at a time. To
write or erase a configuration cell, a TBLWT instruction
can write a ‘1’ or a ‘0’ into the cell.
REV3
DEV6
Bit 3
CP3
—
—
—
—
—
Configuration Bits
WDTPS1
FOSC2
BORV0
EBTR2
WRT2
REV2
DEV5
Bit 2
CP2
LVP
—
—
—
WDTPS0
BOREN
FOSC1
EBTR1
WRT1
REV1
DEV4
Bit 1
CP1
—
—
—
—
PIC18FXX8
PWRTEN
STVREN
WDTEN
FOSC0
EBTR0
WRT0
REV0
DEV3
Bit 0
CP0
—
—
—
DS41159E-page 265
Unprogrammed
--1- -111
---- 1111
---- 1111
1--- -1-1
---- 1111
11-- ----
---- 1111
111- ----
---- 1111
-1-- ----
0000 1000
Default/
Value
(1)