ATTINY88-15MZ Atmel, ATTINY88-15MZ Datasheet - Page 233

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ATTINY88-15MZ

Manufacturer Part Number
ATTINY88-15MZ
Description
IC MCU AVR 8B 8KB FLASH 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY88-15MZ

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Note:
9157B–AVR–01/10
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
Address
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATtiny88 is a complex
microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and
OUT instructions. For the Extended I/O space from 0x60
tions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PORTCR
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
PORTA
PORTD
PORTC
PORTB
DDRA
DDRD
DDRC
DDRB
TIFR1
TIFR0
PINA
PIND
PINC
PINB
PORTD7
PORTC7
PORTB7
Bit 7
PIND7
PINC7
PINB7
BBMD
DDD7
DDC7
DDB7
PORTD6
PORTC6
PORTB6
Bit 6
BBMC
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
PORTD5
PORTC5
PORTB5
Bit 5
PIND5
PINC5
PINB5
BBMB
DDD5
DDC5
DDB5
ICF1
0x1F are directly bit-accessible using the SBI and CBI instructions. In these
PORTD4
PORTC4
PORTB4
PIND4
PINC4
Bit 4
BBMA
PINB4
DDD4
DDC4
DDB4
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc-
PORTD3
PORTC3
PORTA3
PORTB3
Bit 3
PUDD
PINA3
PIND3
PINC3
PINB3
DDA3
DDD3
DDC3
DDB3
PORTA2
PORTD2
PORTC2
PORTB2
OCF1B
OCF0B
PIND2
PINC2
Bit 2
PUDC
PINA2
DDD2
DDC2
PINB2
DDA2
DDB2
ATtiny88 Automotive
0x3F must be used. When addressing I/O
PORTD1
PORTC1
PORTA1
PORTB1
OCF1A
OCF0A
Bit 1
PINA1
PIND1
PINC1
PINB1
PUDB
DDD1
DDC1
DDA1
DDB1
PORTD0
PORTC0
PORTA0
PORTB0
Bit 0
PINA0
PIND0
PINC0
PINB0
PUDA
DDA0
DDD0
DDC0
DDB0
TOV1
TOV0
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