ATTINY88-15MZ Atmel, ATTINY88-15MZ Datasheet - Page 171

• Manufacturer Part Number: ATTINY88-15MZ
• Description: IC MCU AVR 8B 8KB FLASH 32QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY88-15MZ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.6.2
17.7
17.8
9157B–AVR–01/10
ADC Noise Canceler
Analog Input Circuitry
ADC Voltage Reference
In Free Running mode, always select the channel before starting the first conversion. The chan-
nel selection may be changed one ADC clock cycle after writing one to ADSC. However, the
simplest method is to wait for the first conversion to complete, and then change the channel
selection. Since the next conversion has already started automatically, the next result will reflect
the previous channel selection. Subsequent conversions will reflect the new channel selection.
The ADC reference voltage (V
channels that exceed V
AV
bandgap reference (V
The first ADC conversion result after switching reference voltage source may be inaccurate, and
the user is advised to discard this result.
The ADC features a noise canceler that enables conversion during sleep mode. This reduces
noise induced from the CPU core and other I/O peripherals. The noise canceler can be used
with ADC Noise Reduction and Idle mode. To make use of this feature, the following procedure
should be used:
Note that the ADC will not automatically be turned off when entering other sleep modes than Idle
mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before enter-
ing such sleep modes to avoid excessive power consumption.
The analog input circuitry for single ended channels is illustrated in
source applied to ADCn is subjected to the pin capacitance and input leakage of that pin, regard-
less of whether that channel is selected as input for the ADC. When the channel is selected, the
source must drive the S/H capacitor through the series resistance (combined resistance in the
input path).
The ADC is optimized for analog signals with an output impedance of approximately 10k or
less. If such a source is used, the sampling time will be negligible. If a source with higher imped-
ance is used, the sampling time will depend on how long time the source needs to charge the
S/H capacitor, which can vary widely.
With slowly varying signals the user is recommended to use sources with low impedance, only,
since this minimizes the required charge transfer to the S/H capacitor.
• Make sure that the ADC is enabled and is not busy converting. Single Conversion mode must
• Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion once the
• If no other interrupts occur before the ADC conversion completes, the ADC interrupt will wake
CC
be selected and the ADC conversion complete interrupt must be enabled.
CPU has been halted.
up the CPU and execute the ADC Conversion Complete interrupt routine. If another interrupt
wakes up the CPU before the ADC conversion is complete, that interrupt will be executed,
and an ADC Conversion Complete interrupt request will be generated when the ADC
conversion completes. The CPU will remain in active mode until a new sleep command is
executed.
, or internal 1.1V reference. The internal 1.1V reference is generated from the internal
BG
REF
) through an internal amplifier.
will result in codes close to 0x3FF. V
REF
) indicates the conversion range for the ADC. Single ended
ATtiny88 Automotive
REF
can be selected as either
Figure 17-8
An analog
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