PIC16F874-20/L Microchip Technology, PIC16F874-20/L Datasheet - Page 407

IC MCU FLASH 4KX14 EE 44PLCC

PIC16F874-20/L

Manufacturer Part Number
PIC16F874-20/L
Description
IC MCU FLASH 4KX14 EE 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F874-20/L

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Controller Family/series
PIC16F
No. Of I/o's
33
Eeprom Memory Size
128Byte
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164309 - MODULE SKT FOR PM3 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F874-20/L
Manufacturer:
Microchip Technology
Quantity:
10 000
1997 Microchip Technology Inc.
Section 22. Basic 8-bit A/D Converter
The ADRES register contains the result of the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRES register, the GO/DONE bit (ADCON0<2>) is cleared,
and A/D interrupt flag bit ADIF is set. The block diagram of the A/D module is shown in
Figure
After the A/D module has been configured as desired, the selected channel must be acquired
before the conversion is started. The analog input channels must have their corresponding TRIS
bits selected as an input. To determine sample time, see Subsection
Requirements”
following steps should be followed for doing an A/D conversion:
1.
2.
3.
4.
5.
6.
7.
Figure 22-2
time that the A/D module’s holding capacitor is connected to the external voltage level. Then
there is the conversion time of 10 T
two times is the sampling time. There is a minimum acquisition time to ensure that the holding
capacitor is charged to a level that will give the desired accuracy for the A/D conversion.
Figure 22-2:
Configure the A/D module:
• Configure analog pins / voltage reference / and digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear the ADIF bit
• Set the ADIE bit
• Set the GIE bit
Wait the required acquisition time.
Start conversion:
• Set the GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result register (ADRES), clear the ADIF bit, if required.
For next conversion, go to step 1 or step 2 as required. The A/D conversion time per bit is
defined as T
When A/D holding capacitor start to charge.
After A/D conversion, or new A/D channel is selected
22-1.
Acquisition Time
shows the conversion sequence, and the terms that are used. Acquisition time is the
A/D Conversion Sequence
AD
After this acquisition time has elapsed the A/D conversion can be started. The
. A minimum wait of 2T
A/D Sample Time
When A/D conversion is started (setting the GO bit)
A/D Conversion Time
AD
, which is started when the GO bit is set. The sum of these
AD
is required before next acquisition starts.
A/D conversion complete,
result is loaded in ADRES register.
Holding capacitor begins acquiring
voltage level on selected channel
ADIF bit is set
22.3 “A/D Acquisition
DS31022A-page 22-5
22

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