ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 134

• Manufacturer Part Number: ST72F324BJ6B6
• Description: MCU 8BIT 32KB FLASH/ROM 42-SDIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Controller Family/series: ST7
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• No. Of Pwm Channels: 3
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5589-5

Instruction set
Table 76.
11.1.1
11.1.2
134/193
Relative
Relative
Bit
Bit
Bit
Bit
CPU addressing mode overview (continued)
Inherent
All Inherent instructions consist of a single byte. The opcode fully specifies all the required
information for the CPU to process the operation.
Table 77.
Immediate
Immediate instructions have two bytes: The first byte contains the opcode and the second
byte contains the operand value.
Direct
Indirect
Direct
Indirect
Direct
Indirect
NOP
TRAP
WFI
HALT
RET
IRET
SIM
RIM
SCF
RCF
RSP
LD
CLR
PUSH/POP
INC/DEC
TNZ
CPL, NEG
MUL
SLL, SRL, SRA, RLC, RRC
SWAP
Relative
Relative
Inherent instructions
Instruction
jrne loop
jrne [$10]
bset $10,#7
bset [$10],#7
btjt $10,#7,skip
btjt [$10],#7,skip
PC+/-127
PC+/-127
00..FF
00..FF
00..FF
00..FF
No operation
S/W interrupt
Wait for interrupt (low power mode)
Halt oscillator (lowest power mode)
Sub-routine return
Interrupt sub-routine return
Set interrupt mask (level 3)
Reset interrupt mask (level 0)
Set carry flag
Reset carry flag
Reset stack pointer
Load
Clear
Push/Pop to/from the stack
Increment/decrement
Test negative or zero
1 or 2 complement
Byte multiplication
Shift and rotate operations
Swap nibbles
00..FF
00..FF
00..FF
Function
byte
byte
byte
ST72324Bxx
+ 1
+ 2
+ 1
+ 2
+ 2
+ 3