PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet - Page 4

• Manufacturer Part Number: PIC18F6527-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6527-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F872X FAMILY
2.3
For PIC18F6622/8622 devices, the code memory
space extends from 000000h to 00FFFFh (64 Kbytes)
in four 16-Kbyte blocks. For PIC18F6527/8527
devices, the code memory space extends from
000000h to 00BFFFh (48 Kbytes) in three 16-Kbyte
blocks. Addresses, 0000h through 07FFh, however,
define a “Boot Block” region that is treated separately
from Block 0. All of these blocks define code protection
boundaries within the code memory space.
The size of the Boot Block in PIC18F6527/6622/8527/
8622 devices can be configured as 1, 2 or 4K words
(see Table 5-1). This is done through the BBSIZ<1:0>
bits in the Configuration register, CONFIG4L. It is
important to note that increasing the size of the Boot
Block decreases the size of Block 0.
FIGURE 2-3:
DS39643C-page 4
3FFFFFh
01FFFFh
Note:
000000h
200000h
*
Memory Maps
Sizes of memory areas are not to scale.
Boot Block size is determined by the BBSIZ<1:0> bits in CONFIG4L.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18F6527/6622/8527/8622 DEVICES
(PIC18F6622/8622)
Unimplemented
Boot Block
64 Kbytes
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
MEMORY SIZE/DEVICE
(PIC18F6527/8527)
TABLE 2-2:
Unimplemented
PIC18F6527
PIC18F8527
PIC18F6622
PIC18F8622
Boot Block
48 Kbytes
Read ‘0’s
Block 0
Block 1
Block 2
Device
IMPLEMENTATION OF CODE
MEMORY
000000h
0007FFh* or 000FFFh* or 001FFFh*
000800h* or 001000h* or 002000h*
003FFFh
004000h
007FFFh
008000h
00BFFFh
00C000h
00FFFFh
010000h
013FFFh
014000h
017FFFh
018000h
01BFFFh
01C000h
01FFFFh
Address
Range
© 2009 Microchip Technology Inc.
Code Memory Size (Bytes)
000000h-00BFFFh (48K)
000000h-00FFFFh (64K)