PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet - Page 34

• Manufacturer Part Number: PIC18F6527-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6527-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F872X FAMILY
TABLE 5-3:
DS39643C-page 34
WRTB
WRTC
EBTR7
EBTR6
EBTR5
EBTR4
EBTR3
EBTR2
EBTR1
EBTR0
EBTRB
DEV<10:3>
DEV<2:0>
REV<4:0>
Note 1:
Bit Name
2:
The BBSIZ<1:0> bits cannot be changed once any of the following code-protect bits are enabled: CPB or CP0, WRTB
or WRT0, EBTRB or EBTR0.
Available on PIC18F8XXX devices only.
PIC18F872X FAMILY CONFIGURATION BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG6H
CONFIG6H
CONFIG7H
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
Write Protection bit (Boot Block memory area)
1 = Boot Block is not write-protected
0 = Boot Block is write-protected
Write Protection bit (Configuration registers)
1 = Configuration registers are not write-protected
0 = Configuration registers are write-protected
Table Read Protection bit (Block 7 code memory area)
1 = Block 7 is not protected from table reads executed in other blocks
0 = Block 7 is protected from table reads executed in other blocks
Table Read Protection bit (Block 6 code memory area)
1 = Block 6 is not protected from table reads executed in other blocks
0 = Block 6 is protected from table reads executed in other blocks
Table Read Protection bit (Block 5 code memory area)
1 = Block 5 is not protected from table reads executed in other blocks
0 = Block 5 is protected from table reads executed in other blocks
Table Read Protection bit (Block 4 code memory area)
1 = Block 4 is not protected from table reads executed in other blocks
0 = Block 4 is protected from table reads executed in other blocks
Table Read Protection bit (Block 3 code memory area)
1 = Block 3 is not protected from table reads executed in other blocks
0 = Block 3 is protected from table reads executed in other blocks
Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from table reads executed in other blocks
0 = Block 2 is protected from table reads executed in other blocks
Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from table reads executed in other blocks
0 = Boot Block is protected from table reads executed in other blocks
Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to identify the
part number.
Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to identify the
part number.
Revision ID bits
These bits are used to indicate the revision of the device.
Description
© 2009 Microchip Technology Inc.