PIC16F873-04I/SO Microchip Technology, PIC16F873-04I/SO Datasheet - Page 285

• Manufacturer Part Number: PIC16F873-04I/SO
• Description: IC MCU FLASH 4KX14 EE 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F873-04I/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 22
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 192Byte
• Cpu Speed: 4MHz
• No. Of Timers: 3
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 4 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 22
• Interface Type: I2C/SPI/USART
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

17.3
17.3.1
1997 Microchip Technology Inc.
Operation
SPI Mode
The SPI mode allows 8-bits of data to be synchronously transmitted and received simulta-
neously. All four modes of SPI are supported. To accomplish communication, typically three pins
are used:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally a fourth pin may be used when in a slave mode of operation:
• Slave Select (SS)
When initializing the SPI, several options need to be specified. This is done by programming the
appropriate control bits in the SSPCON1 register (SSPCON1<5:0>) and SSPSTAT<7:6>. These
control bits allow the following to be specified:
• Master Mode (SCK is the clock output)
• Slave Mode (SCK is the clock input)
• Clock Polarity (Idle state of SCK)
• Data input sample phase (middle or end of data output time)
• Clock edge (output data on rising/falling edge of SCK)
• Clock Rate (Master mode only)
• Slave Select Mode (Slave mode only)
Figure 17-4
Figure 17-4:
shows the block diagram of the SSP module, when in SPI mode.
SSP Block Diagram (SPI Mode)
SDO
SCK
SDI
SS
Preliminary
Read
SS Control
Select
SMP:CKE
Edge
Enable
bit0
Select
Edge
SSPBUF reg
TRIS bit
Data to TX/RX in SSPSR
2
SSPM3:SSPM0
SSPSR reg
Clock Select
Section 17. MSSP
4
2
Write
Prescaler
4, 16, 64
clock
shift
TMR2 output
data bus
Internal
2
T
OSC
DS31017A-page 17-9
17