AD9510-VCO/PCB Analog Devices Inc, AD9510-VCO/PCB Datasheet - Page 6

• Manufacturer Part Number: AD9510-VCO/PCB
• Description: BOARD EVAL CLOCK DISTR 64LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9510-VCO/PCB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD9510/PCB
CLOCK OUTPUTS
There are eight clock outputs on the AD9510. Four are
LVPECL and four are LVDS/CMOS. Each output has a
variety of possibilities for output termination.
Output Termination Options
LVPECL Clock Outputs
Each LVPECL output has several output termination options
(see Table 5). There are pads for ac coupling capacitors, which
can be shorted with 0 Ω resistors if necessary. Additionally,
there are two trace-to-GND resistor pads, one before and one
after the ac coupling cap. Finally, there is a trace-to-VDD
resistor pad. These pads can be used in any combination to
provide a wide range of termination possibilities.
LVDS/CMOS Clock Outputs
Each LVDS output has several output termination options.
First and foremost, a trace-to-trace resistor is used to control
the differential impedance termination. Another trace-to-trace
pad can be used for an additional resistor or a trace-to-trace
capacitive load. Finally, there are two capacitors to GND that
can be used for capacitive loading, or with resistors as resistor-
to-ground terminations.
Table 5. LVPECL Output Termination Components
Output Channel
OUT0
OUT0B
OUT1
OUT1B
OUT2
OUT2B
OUT3
OUT3B
Table 6. LVDS Output Termination Components
Output Channel
OUT4
OUT4B
OUT5
OUT5B
OUT6
OUT6B
OUT7
OUT7B
Termination Resistor
R56
R56
R36
R36
R28
R28
R46
R46
Pre-AC Coupling
Resistor to GND
R4
R7
R13
R12
R61
R1
R23
R20
AC Coupling Capacitor
C4
C3
C5
C6
C1
C2
C7
C8
Loading Capacitor to GND
C25
C26
C17
C21
C9
C10
C30
C31
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Default Configuration
LVPECL Default Configuration
The default output termination for the LVPECL outputs is
50 Ω to VDD − 2 V. This is accomplished by connecting each
output trace, both the true and the complementary, to VDD
through a 127 Ω resistor and to GND through an 83 Ω resistor.
Additionally, the trace is not ac-coupled, so that there is a 0 Ω
resistor in series with each trace where the ac-coupled capacitor
would be located.
LVDS/CMOS Default Configuration
The default output termination for the LVDS outputs is a
100 Ω resistor between the two traces. This provides the
100 Ω differential impedance for the LVDS signal. None of
the capacitive loading pads is populated.
Changing the Configuration
Changing the termination configuration is as simple as
removing or adding resistors and capacitors. Because there are
so many different options for termination configurations, refer
to Table 5 and Table 6, as well as the Schematic section and text
found on the evaluation board to help determine the
appropriate termination scheme.
Post-AC Coupling
Resistor to GND
R82
R80
R19
R14
R57
R60
R27
R25
Loading Capacitor to Other Trace
C27
C27
C22
C22
C12
C12
C32
C32
Post-AC Coupling
Resistor to VDD
R81
R32
R16
R15
R58
R59
R26
R24