ULINKPRO Keil, ULINKPRO Datasheet - Page 42

KIT DEBUG/TRACE UNIT HIGH SPEED

ULINKPRO

Manufacturer Part Number
ULINKPRO
Description
KIT DEBUG/TRACE UNIT HIGH SPEED
Manufacturer
Keil
Type
In-Circuit, Real-Time Debugger/Programmerr
Datasheets

Specifications of ULINKPRO

Contents
Module
For Use With/related Products
ARM7, ARM9, Cortex
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Getting Started: Creating Applications with µVision
41
8051, C166/XE166/XC2000, and ARM Cortex-Mx microcontrollers provide
several interrupt levels. Higher-level interrupts may halt lower-level interrupts,
or the main function.
It is impossible to suspend the execution of an ISR except through higher priority
interrupts. Therefore, the timing of a system with many complex ISR levels is
unpredictable, since high priority interrupts may take up most of the CPU time.
Another challenge is to determine the worst-case stack nesting. Applications
with complex ISR designs can have unnoticed stack resource issues, which may
cause sporadic execution faults. Note, that the ARM architecture provides an
extra stack for ISR that avoids stack memory surprises during the main loop
execution.
RTOS Design
The RTOS design, due to its very nature, allows several tasks to execute within
sequential time slices. A preemptive RTOS provides task priority levels, in
which high priority tasks interrupt the execution of low priority tasks. Most
RTOS systems offer inter-task communication and time delay functions
supporting the design of complex applications.
The ARM based architectures are designed for RTOS usage. An RTOS is almost
mandatory on ARM7, ARM9, and Cortex-Mx based systems that have several
interrupt sources. ARM devices provide a separate ISR stack, and hence, each
task needs no additional stack for ISR execution (as required on 8051 and
C166/XE166/XC2000 devices).

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