MPC8272ADS Freescale Semiconductor, MPC8272ADS Datasheet - Page 49

• Manufacturer Part Number: MPC8272ADS
• Description: KIT DEVELOPMENT MPC8272
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8272ADS

• Contents: Board
• For Use With/related Products: MPC8272
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
L2CPC
DPPC
Reserved
ISB
BMS
BBD
MMR
LBPC
APPC
CS10PC
ALD_EN
PCI_MODCK
MODCK_HI
Applies only ONCE after power-up reset.
Field
Table 5-1. BCSR/FLASH Hard Reset Configuration Word (continued)
1
18:19
24:25
28:31
10:11
13:15
20:21
22:23
Data
Bus
Bits
8:9
12
16
17
26
27
Value
‘1010’
Prog
[Bin]
’010’
‘01’
’01’
’10’
’01’
‘11’
’11’
’0’
’0’
’0’
’0’
’1’
CI/BADDR(29)/IRQ2 selected as IRQ2
WT/BADDR(30)/IRQ3 selected as IRQ3
L2_HIT/IRQ4 selected as IRQ4
CPU_BG/BADDR(31)/IRQ5 as IRQ5)
Data Parity Pin configuration as:
DP0 as EXT_BR2
DP1 as EXT_BG2
DP2 as EXT_DBG2
DP3 as EXT_BR3
DP4 as EXT_BG3
DP5 as EXT_DBG3
DP6 as IRQ6
DP7 as IRQ7
Reserved.
IMMR initial value 0x0F000000, i.e., the
internal space resides initially at this address.
Boot memory (Flash) at 0xFE000000.
ABB/IRQ2 pin is ABB
DBB/IRQ3 pin is DBB
‘11’ - Mask Masters Requests. Boot Master is
MPC8272s 60x.
‘01’ - Local Bus pins function as PCI bus.
MODCK1/AP(1)/TC(0) functions as BKSEL0
MODCK2/AP(2)/TC(1) functions as BKSEL1
MODCK3/AP(3)/TC(2) functions as BKSEL2
IRQ7~/APE~ functions as IRQ7~
CS11~/AP(0) functions as CS11~
CS10~/BCTL1/DBG_DIS~ functions as BCTL1
PCI Auto Load Enable. When high, PCI Bridge
Configuration is done automatically from the
FLASH/E
- PPC core should be disabled) right after the
Hard Configuration Word. When low, the PPC
Core should configure the PCI Bridge.
Determines PCI clock settings as set by
PCI_MODCKH:
‘0’ - PCI clock set by PCI_MODCKH
‘1’ - PCI clock is divided according to
PCI_MODCKH
Determines the Core’s frequency out of
power-up reset.
Chapter 5. Module Design
2
PROM (CPM is configuration master
Implication
Reset and Reset Configuration
Offset In
Flash
[Hex]
10
18
8
Value
[Hex]
5A
72
36