C8051F040-TB Silicon Laboratories Inc, C8051F040-TB Datasheet - Page 97
C8051F040-TB
Manufacturer Part Number
C8051F040-TB
Description
BOARD PROTOTYPING W/C8051F040
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F040-TB
Contents
Board
Processor To Be Evaluated
C8051F04x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F040
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bits7-3:
Bit2:
Bits1-0:
AD2SC4
R/W
Bit7
AD2SC4-0: ADC2 SAR Conversion Clock Period Bits
SAR Conversion clock is derived from system clock by the following equation, where
AD2SC refers to the 5-bit value held in AD2SC4-0. SAR conversion clock requirements are
given in Table 7.2.
UNUSED. Read = 0b. Write = don’t care.
AMP2GN1-0: ADC2 Internal Amplifier Gain (PGA)
00: Gain = 0.5
01: Gain = 1
10: Gain = 2
11: Gain = 4
*Note: AD2SC is the rounded-up result.
AD2SC
AD2SC3
R/W
Bit6
SFR Definition 7.3. ADC2CF: ADC2 Configuration
SYSCLK
---------------------- - 1
CLK
AD2SC2
R/W
Bit5
SAR2
–
AD2SC1
R/W
Bit4
*
or
AD2SC0
Rev. 1.5
R/W
Bit3
CLK
C8051F040/1/2/3/4/5/6/7
SAR2
Bit2
R
-
=
---------------------------- –
AD2SC
SYSCLK
AMP2GN1 AMP2GN0 11111000
R/W
Bit1
+
1
SFR Address:
SFR Page:
R/W
Bit0
0xBC
2
Reset Value
97
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