C8051F040-TB Silicon Laboratories Inc, C8051F040-TB Datasheet - Page 175

• Manufacturer Part Number: C8051F040-TB
• Description: BOARD PROTOTYPING W/C8051F040
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040-TB

• Contents: Board
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F040
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crystal/
resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 14.1. In RC,
capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 and/or XTAL1
pin(s) as shown in Option 2, 3, or 4 of Figure 14.1. The type of external oscillator must be selected in the
OSCXCN register, and the frequency control bits (XFCN) must be selected appropriately (see SFR Defini-
tion 14.4).
14.3. System Clock Selection
The CLKSL bit in register CLKSEL selects which oscillator is used as the system clock. CLKSL must be
set to ‘1’ for the system clock to run from the external oscillator; however the external oscillator may still
clock peripherals (timers, PCA) when the internal oscillator is selected as the system clock. The system
clock may be switched on-the-fly between the internal and external oscillator, so long as the selected oscil-
lator is enabled and has settled. The internal oscillator requires little start-up time and may be enabled and
selected as the system clock in the same write to OSCICN. External crystals and ceramic resonators typi-
cally require a start-up time before they are settled and ready for use as the system clock. The Crystal
Valid Flag (XTLVLD in register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To
avoid reading a false XTLVLD in crystal mode, software should delay at least 1 ms between enabling the
external oscillator and checking XTLVLD. RC and C modes typically require no startup time.
Calibrated Internal Oscillator 
Frequency
Internal Oscillator Supply Current
(from V
External Clock Frequency
T
T
XCH
XCL
Bits7-1:
Bit0:
(External Clock Low Time)
(External Clock High Time)
Bit7
R
-
DD
)
Parameter
Reserved.
CLKSL: System Clock Source Select Bit.
0: SYSCLK derived from the Internal Oscillator, and scaled as per the IFCN bits in OSCICN.
1: SYSCLK derived from the External Oscillator circuit.
SFR Definition 14.3. CLKSEL: Oscillator Clock Selection
Table 14.1. Internal Oscillator Electrical Characteristics
Bit6
R
-
Bit5
R
-
–40 to +85 °C unless otherwise specified.
OSCICN.7 = 1
Bit4
R
-
Conditions
Rev. 1.5
Bit3
R
-
C8051F040/1/2/3/4/5/6/7
Bit2
R
-
Min
24
15
15
—
0
Bit1
R
-
24.5
Typ
450
—
—
—
SFR Address:
CLKSL
SFR Page:
R/W
Bit0
Max
25
30
—
—
—
0x97
F
00000000
Reset Value
Units
MHz
MHz
µA
ns
ns
175