C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 79
![BOARD PROTOTYPING W/C8051F020](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F020-TB
Manufacturer Part Number
C8051F020-TB
Description
BOARD PROTOTYPING W/C8051F020
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F020-TB
Contents
Board
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F020
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bits7-3:
Bit2:
Bits1-0:
Bits7-3:
Bits2-0:
AD1SC4
R/W
R/W
Bit7
Bit7
-
Figure 7.5. AMX1SL: AMUX1 Channel Select Register (C8051F020/1/2/3)
Figure 7.4. ADC1CF: ADC1 Configuration Register (C8051F020/1/2/3)
AD1SC4-0: ADC1 SAR Conversion Clock Period Bits
SAR Conversion clock is derived from system clock by the following equation, where AD1SC refers
to the 5-bit value held in AD1SC4-0. SAR conversion clock requirements are given in Table 7.1.
AD1SC
UNUSED. Read = 0b. Write = don’t care.
AMP1GN1-0: ADC1 Internal Amplifier Gain (PGA)
00: Gain = 0.5
01: Gain = 1
10: Gain = 2
11: Gain = 4
UNUSED. Read = 00000b; Write = don’t care
AMX1AD2-0: AMX1 Address Bits
000-111b: ADC1 Inputs selected as follows:
000: AIN1.0 selected
001: AIN1.1 selected
010: AIN1.2 selected
011: AIN1.3 selected
100: AIN1.4 selected
101: AIN1.5 selected
110: AIN1.6 selected
111: AIN1.7 selected
AD1SC3
R/W
R/W
Bit6
Bit6
-
=
---------------------- - 1
CLK
SYSCLK
AD1SC2
R/W
R/W
Bit5
Bit5
-
SAR1
–
AD1SC1
R/W
R/W
Bit4
Bit4
-
AD1SC0
R/W
R/W
Bit3
Bit3
-
Rev. 1.4
AMX1AD2 AMX1AD1 AMX1AD0 00000000
R/W
R/W
Bit2
Bit2
-
AMP1GN1 AMP1GN0 11111000
C8051F020/1/2/3
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
0xAB
0xAC
79
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