C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 167

• Manufacturer Part Number: C8051F020-TB
• Description: BOARD PROTOTYPING W/C8051F020
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F020-TB

• Contents: Board
• Processor To Be Evaluated: C8051F02x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F020
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TX0
RX0
SCK
MISO
MOSI
NSS
SDA
SCL
TX1
RX1
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
CP0
CP1
T0
/INT0
T1
/INT1
T2
T2EX
T4
T4EX
/SYSCLK
CNVSTR
PIN I/O 0
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     
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1
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
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
2
(EMIFLE = 1; EMIF in Non-multiplexed Mode; P1MDIN = 0xFF)
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

3
P0
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

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

4





5
6
7
Figure 17.5. Priority Crossbar Decode Table
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            
             
              
               
                
                 
                  
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                    
                     
0
AIN1 Inputs/Non-muxed Addr H Muxed Addr H/Non-muxed Addr L
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1

  
    
      
2
3
P1
4
5
6
7
0
1
Rev. 1.4
2
3
P2
4
5
6
7
0
Muxed Data/Non-muxed Data
1
C8051F020/1/2/3
2
3
P3
4
5
6
7
Crossbar Register Bits
UART0EN:
UART1EN:
SMB0EN:
PCA0ME:
SYSCKE: XBR1.7
CNVSTE: XBR2.0
SPI0EN:
T2EXE: XBR1.6
T4EXE: XBR2.4
ECI0E: XBR0.6
INT0E: XBR1.2
INT1E: XBR1.4
CP0E: XBR0.7
CP1E: XBR1.0
T0E: XBR1.1
T1E: XBR1.3
T2E: XBR1.5
T4E: XBR2.3
XBR0.2
XBR0.1
XBR0.0
XBR2.2
XBR0.[5:3]
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