C8051F300-TB Silicon Laboratories Inc, C8051F300-TB Datasheet - Page 49

• Manufacturer Part Number: C8051F300-TB
• Description: BOARD PROTOTYPING W/C8051F300
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F300-TB

• Contents: Board
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F300
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.
The voltage reference MUX on C8051F300/2 devices is configurable to use an externally connected volt-
age reference or the power supply voltage, V
register (REF0CN) selects the reference source. For an external source, REFSL should be set to ‘0’; For
V
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor,
and Internal Oscillator. This bit is forced to logic 1 when any of the aforementioned peripherals is enabled.
The bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register REF0CN; see
SFR Definition 6.1 for REF0CN register details. The electrical specifications for the voltage reference cir-
cuit are given in Table 6.1.
Important Note About the VREF Input: Port pin P0.0 is used as the external VREF input. When using an
external voltage reference, P0.0 should be configured as analog input and skipped by the Digital Crossbar.
To configure P0.0 as analog input, set to ‘1’ Bit0 in register P0MDIN. To configure the Crossbar to skip
P0.0, set to ‘1’ Bit0 in register XBR0. Refer to
Port I/O configuration details. The external reference voltage must be within the range 0  VREF  V
On C8051F300/2 devices, the temperature sensor connects to the highest order input of the ADC0 positive
input multiplexer (see
bit in register REF0CN enables/disables the temperature sensor. While disabled, the temperature sensor
defaults to a high impedance state and any ADC0 measurements performed on the sensor result in mean-
ingless data.
DD
as the reference source, REFSL should be set to ‘1’.
VDD
GND
Voltage Reference (C8051F300/2)
R1
Reference
External
Voltage
Circuit
Figure 6.1. Voltage Reference Functional Block Diagram
Section “5.1. Analog Multiplexer and PGA” on page 36
VREF
VDD
REF0CN
DD
Section “12. Port Input/Output” on page 103
0
1
(see Figure 6.1). The REFSL bit in the Reference Control
Rev. 2.9
IOSCEN
EN
EN
C8051F300/1/2/3/4/5
Bias Generator
Temp Sensor
for details). The TEMPE
To Analog Mux
Internal
VREF
(to ADC)
To ADC, Internal
Oscillator,
Temperature Sensor
for complete
DD
.
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