C8051F300-TB Silicon Laboratories Inc, C8051F300-TB Datasheet - Page 129

• Manufacturer Part Number: C8051F300-TB
• Description: BOARD PROTOTYPING W/C8051F300
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F300-TB

• Contents: Board
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F300
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

0010
0010
0001
0000
Values Read
1
1
0
1
0
0
1
1
0
1
1
1
0
1
0
1
Table 13.4. SMBus Status Decoding (Continued)
X A slave address was received;
X Lost arbitration as master; slave
X Lost arbitration while attempting a
X Lost arbitration while attempting a
X A STOP was detected while
X Lost arbitration due to a detected
X A slave byte was received; ACK
X
ACK requested.
address received; ACK
requested.
repeated START.
STOP.
addressed as a Slave Transmitter
or Slave Receiver.
STOP.
requested.
Lost arbitration while transmitting
a data byte as master.
Current SMbus State
Rev. 2.9
Acknowledge received
address (received slave
address match, R/W bit =
READ).
Do not acknowledge
received address.
Acknowledge received
address, and switch to trans-
mitter mode (received slave
address match, R/W bit =
WRITE); see
for procedure.
Acknowledge received
address (received slave
address match, R/W bit =
READ).
Do not acknowledge
received address.
Acknowledge received
address, and switch to trans-
mitter mode (received slave
address match, R/W bit =
WRITE); see
for procedure.
Reschedule failed transfer;
do not acknowledge received
address
Abort failed transfer.
Reschedule failed transfer.
No action required (transfer
complete/aborted).
Clear STO.
Abort transfer.
Reschedule failed transfer.
Acknowledge received byte;
Read SMB0DAT.
Do not acknowledge
received byte.
Abort failed transfer.
Reschedule failed transfer.
Typical Response Options
C8051F300/1/2/3/4/5
Section 13.5.4
Section 13.5.4
1
0
0
0
0
0
0
1
0
1
0
0
0
1
0
0
0
Written
Values
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
X
X
X
X
1
0
1
1
0
1
0
0
1
0
0
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