AT91RM9200-EK Atmel, AT91RM9200-EK Datasheet - Page 31

• Manufacturer Part Number: AT91RM9200-EK
• Description: DEVEL KIT
• Manufacturer: Atmel
• Series: ARM®, Thumb®r
• Type: MCUr

Specifications of AT91RM9200-EK

• Contents: Development Board, AC adapter, Cables and Software
• Processor To Be Evaluated: AT91RM9200
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB
• For Use With/related Products: ARM920T
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q2427672

10.17 Serial Synchronous Controller
10.18 Timer Counter
1768MS–ATARM–09-Jul-09
The USART describes features allowing management of the Modem Signals DTR, DSR, DCD
and RI. For details, see
In the AT91RM9200, only the USART1 implements these signals, named DTR1, DSR1, DCD1
and RI1.
The USART0, USART2 and USART3 do not implement all the modem signals. Only RTS and
CTS (RTS0 and CTS0, RTS2 and CTS2, RTS3 and CTS3, respectively) are implemented in
these USARTs for other features.
Thus, programming the USART0, USART2 or the USART3 in Modem Mode may lead to unpre-
dictable results. In these USARTs, the commands relating to the Modem Mode have no effect
and the status bits relating the status of the modem signals are never activated.
• RS485 with driver control signal
• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
• IrDA modulation and demodulation
• Test Modes
• Connection of two Peripheral DMA Controller (PDC) channels
• Provides serial synchronous communication links used in audio and telecom applications
• Contains an independent receiver and transmitter and a common clock divider
• Interfaced with two PDC channels to reduce processor overhead
• Offers a configurable frame sync and data length
• Receiver and transmitter can be programmed to start automatically or on detection of
• Receiver and transmitter include a data signal, a clock signal and a frame synchronization
• Three 16-bit Timer Counter Channels
• Wide range of functions including:
different event on the frame sync signal
signal
– MSB- or LSB-first
– Optional break generation and detection
– By 8 or by-16 over-sampling receiver frequency
– Optional hardware handshaking RTS-CTS
– Optional modem signal management DTR-DSR-DCD-RI
– Receiver time-out and transmitter timeguard
– Optional Multi-drop Mode with address generation and detection
– NACK handling, error counter with repetition and iteration limit
– Communication at up to 115.2 Kbps
– Remote Loopback, Local Loopback, Automatic Echo
– Offers buffer transfer without processor intervention
– Frequency Measurement
– Event Counting
”Modem Mode” on page
435.
AT91RM9200
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