AT91RM9200-EK Atmel, AT91RM9200-EK Datasheet - Page 15

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AT91RM9200-EK

Manufacturer Part Number
AT91RM9200-EK
Description
DEVEL KIT
Manufacturer
Atmel
Series
ARM®, Thumb®r
Type
MCUr
Datasheets

Specifications of AT91RM9200-EK

Contents
Development Board, AC adapter, Cables and Software
Processor To Be Evaluated
AT91RM9200
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB
For Use With/related Products
ARM920T
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Q2427672
7.3
7.4
7.5
1768MS–ATARM–09-Jul-09
Boot Program
Embedded Software Services
Memory Controller
• Debug Unit
• Embedded Trace Macrocell: ETM9
• IEEE1149.1 JTAG Boundary Scan on all Digital Pins
• Default Boot Program stored in ROM-based products
• Downloads and runs an application from external storage media into internal SRAM
• Downloaded code size depends on embedded SRAM size
• Automatic detection of valid application
• Bootloader supporting a wide range of non-volatile memories
• Boot Uploader in case no valid program is detected in external NVM and supporting several
• Serial communication on a DBGU (XModem protocol)
• USB Device Port (DFU Protocol)
• Compliant with ATPCS
• Compliant with AINSI/ISO Standard C
• Compiled in ARM/Thumb Interworking
• ROM Entry Service
• Tempo, Xmodem and DataFlash services
• CRC and Sine tables
• Programmable Bus Arbiter handling four Masters
communication media
– Two-pin UART
– Debug Communication Channel
– Chip ID Register
– Medium Level Implementation
– Half-rate Clock Mode
– Four Pairs of Address Comparators
– Two Data Comparators
– Eight Memory Map Decoder Inputs
– Two Counters
– One Sequencer
– One 18-byte FIFO
– SPI DataFlash
– Two-wire EEPROM
– 8-bit parallel memories on NCS0
– Internal Bus is shared by ARM920T, PDC, USB Host Port and Ethernet MAC
– Each Master can be assigned a priority between 0 and 7
Masters
®
connected on SPI NPCS0
Rev2a
AT91RM9200
15

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