QSK-62P PLUS BNS Solutions, QSK-62P PLUS Datasheet - Page 79

• Manufacturer Part Number: QSK-62P PLUS
• Description: KIT QUICK START RENESAS 62P
• Manufacturer: BNS Solutions
• Series: M16C™r
• Type: MCUr

Specifications of QSK-62P PLUS

• Contents: Board, Cable, CD
• For Use With/related Products: M16C/62P
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Other names: 867-1000; QSK-62P; QSK26A; QSK62P

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ03B0001-0241
Figure 5.17
Memory Expansion Mode, Microprocessor Mode
(for 1-wait setting and external area access)
Read timing
Write timing
t
cyc
Measuring conditions
BCLK
CSi
ADi
BHE
ALE
RD
DBi
BCLK
CSi
ADi
BHE
ALE
WR,WRL,
WRH
DBi
· V
· Input timing voltage : V
· Output timing voltage : V
=
Jan 10, 2006
CC1
f(BCLK)
=V
1
Timing Diagram (5)
CC2
=3V
t
d(BCLK−ALE)
t
t
d(BCLK−ALE)
d(BCLK−CS)
t
t
d(BCLK−CS)
d(BCLK−AD)
t
30ns.max
30ns.max
d(BCLK−AD)
30ns.max
30ns.max
30ns.max
30ns.max
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Hi−Z
t
t
cyc
cyc
IL
=0.6V, V
OL
t
h(BCLK−ALE)
Hi−Z
=1.5V, V
t
t
d(BCLK−RD)
h(BCLK−ALE)
−4ns.min
30ns.max
−4ns.min
IH
=2.4V
OH
(1.5 × t
=1.5V
t
d(BCLK−WR)
(0.5 × t
t
t
ac2(RD−DB)
d(BCLK−DB)
cyc
30ns.max
40ns.max
t
−60)ns.max
d(DB−WR)
cyc
−40)ns.min
t
su(DB−RD)
50ns.min
(0.5 × t
t
h(BCLK−WR)
t
h(WR−AD)
t
0ns.min
h(WR−DB)
(0.5 × t
t
0ns.min
h(RD−AD)
cyc
−10)ns.min
cyc
−10)ns.min
t
h(BCLK−CS)
t
h(BCLK−CS)
t
t
t
t
h(BCLK−DB)
h(BCLK−AD)
h(BCLK−AD)
h(BCLK−RD)
4ns.min
4ns.min
0ns.min
4ns.min
4ns.min
4ns.min
t
h(RD−DB)
0ns.min
V
CC1
5. Electrical Characteristics
=V
CC2
=3V