DM300023 Microchip Technology, DM300023 Datasheet - Page 24

KIT DEMO DSPICDEM SMPS BUCK

DM300023

Manufacturer Part Number
DM300023
Description
KIT DEMO DSPICDEM SMPS BUCK
Manufacturer
Microchip Technology
Series
dsPIC™r
Datasheets

Specifications of DM300023

Main Purpose
DC/DC, Step Down
Outputs And Type
2, Non-Isolated
Voltage - Input
7 ~ 15V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
dsPIC30F2020
Processor To Be Evaluated
dsPIC30F202x/1010
Interface Type
RS-232
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-
Power - Output
-
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DM300023
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
DM300023
Manufacturer:
MICROCHIP
Quantity:
12 000
dsPIC30F1010/202X
2.3
The dsPIC DSC devices feature a 16/16-bit signed
fractional divide operation, as well as 32/16-bit and 16/
16-bit signed and unsigned integer divide operations, in
the form of single instruction iterative divides. The
following instructions and data sizes are supported:
1.
2.
3.
4.
5.
The 16/16 divides are similar to the 32/16 (same number
of iterations), but the dividend is either zero-extended or
sign-extended during the first iteration.
TABLE 2-1:
DS70178C-page 22
DIVF
DIV.sd
DIV.ud
DIV.sw
DIV.uw
DIVF – 16/16 signed fractional divide
DIV.sd – 32/16 signed divide
DIV.ud – 32/16 unsigned divide
DIV.sw – 16/16 signed divide
DIV.uw – 16/16 unsigned divide
Divide Support
Instruction
DIVIDE INSTRUCTIONS
Signed fractional divide: Wm/Wn
Signed divide: (Wm + 1:Wm)/Wn
Unsigned divide: (Wm + 1:Wm)/Wn
Signed divide: Wm / Wn
Unsigned divide: Wm / Wn
Preliminary
The divide instructions must be executed within a
REPEAT loop. Any other form of execution (e.g. a series
of discrete divide instructions) will not function correctly
because the instruction flow depends on RCOUNT.
The divide instruction does not automatically set up the
RCOUNT value, and it must, therefore, be explicitly
and correctly specified in the REPEAT instruction, as
shown in Table 2-1 (REPEAT will execute the target
instruction {operand value + 1} times). The REPEAT
loop count must be set up for 18 iterations of the DIV/
DIVF instruction. Thus, a complete divide operation
requires 19 cycles.
Note:
W0; Rem
W0; Rem
Function
The Divide flow is interruptible. However,
the user needs to save the context as
appropriate.
W0; Rem
W0; Rem
W0; Rem
W1
W1
© 2006 Microchip Technology Inc.
W1
W1
W1

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