DM300023 Microchip Technology, DM300023 Datasheet - Page 204

KIT DEMO DSPICDEM SMPS BUCK

DM300023

Manufacturer Part Number
DM300023
Description
KIT DEMO DSPICDEM SMPS BUCK
Manufacturer
Microchip Technology
Series
dsPIC™r
Datasheets

Specifications of DM300023

Main Purpose
DC/DC, Step Down
Outputs And Type
2, Non-Isolated
Voltage - Input
7 ~ 15V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
dsPIC30F2020
Processor To Be Evaluated
dsPIC30F202x/1010
Interface Type
RS-232
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-
Power - Output
-
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DM300023
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
DM300023
Manufacturer:
MICROCHIP
Quantity:
12 000
dsPIC30F1010/202X
REGISTER 18-3:
REGISTER 18-4:
DS70178C-page 202
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-8
bit 7-0
R/W-0
R/W-0
R/W-0
U-0
TSEQ7<3:0>: Tune Sequence value #7 bits
When PWM ROLL<2:0> = 111, this field is used to tune the FRC instead of TUN<3:0>
TSEQ6<3:0>: Tune Sequence value #6 bits
When PWM ROLL<2:0> = 110, this field is used to tune the FRC instead of TUN<3:0>
TSEQ5<3:0>: Tune Sequence value #5 bits
When PWM ROLL<2:0> = 101, this field is used to tune the FRC instead of TUN<3:0>
TSEQ4<3:0>: Tune Sequence value #4 bits
When PWM ROLL<2:0> = 100, this field is used to tune the FRC instead of TUN<3:0>
Unimplemented: Read as ‘0’
When PWM ROLL<2:0> = 111, this field is used to tune the FRC instead of TUN<3:0>
LFSR <14:8>: Most Significant 7 bits of the pseudo random FRC trim value bits
LFSR <7:0>:
R/W-0
R/W-0
R/W-0
R/W-0
OSCTUN2: OSCILLATOR TUNING REGISTER 2
LFSR: LINEAR FEEDBACK SHIFT REGISTER
TSEQ7<3:0>
TSEQ5<3:0>
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
Least Significant 8 bits of the pseudo random FRC trim value bits
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
LFSR<7:0>
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
LFSR<14:8>
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
TSEQ6<3:0>
TSEQ4<3:0>
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0

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