DM300023 Microchip Technology, DM300023 Datasheet

KIT DEMO DSPICDEM SMPS BUCK

DM300023

Manufacturer Part Number
DM300023
Description
KIT DEMO DSPICDEM SMPS BUCK
Manufacturer
Microchip Technology
Series
dsPIC™r
Datasheets

Specifications of DM300023

Main Purpose
DC/DC, Step Down
Outputs And Type
2, Non-Isolated
Voltage - Input
7 ~ 15V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
dsPIC30F2020
Processor To Be Evaluated
dsPIC30F202x/1010
Interface Type
RS-232
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-
Power - Output
-
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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The dsPIC30F1010/202X (Rev. A3) devices that you
received were found to conform to the specifications
and functionality described in the following documents:
• “dsPIC30F1010/202X Data Sheet” (DS70178)
• “dsPIC30F/33F Programmer’s Reference
• “dsPIC30F Family Reference Manual” (DS70046)
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the devices listed below:
• dsPIC30F1010
• dsPIC30F2020
• dsPIC33F2023
dsPIC30F1010/202X Rev. A3 silicon is identified by
performing a “Reset and Connect” operation to the
device using MPLAB
or later. The output window will show a successful
connection to the device specified in Configure>Select
Device.
The errata described in this section will be addressed
in future revisions of silicon.
© 2008 Microchip Technology Inc.
Manual” (DS70157)
dsPIC30F1010/202X Rev. A3 Silicon Errata
®
ICD 2 with MPLAB IDE v7.41.03
dsPIC30F1010/202X
Silicon Errata Summary
The following list summarizes the errata described in
this document:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. ADC Interrupts
11. ADC Conversion Rate
PWM Dead Time
If a value less than 0x0010 is written to the DTRx
and ALTDTRx registers, either or both of the
PWMHx and PWMLx outputs will not function.
PWM Duty Cycle
Duty cycle resolution is not 1.1 ns over the entire
duty cycle range.
PWM Triggers
The PWM Special Event Trigger and PWM
Individual Trigger do not function near the
beginning of the PWM period.
PWM Override Enable
The PWM override feature does not work
correctly.
PWM Duty Cycle
When the PWM module is operated with
immediate duty cycle updates enabled, any duty
cycle value less than or equal to 0x0010 causes
the PWM outputs to flip to the inverted state.
PWM Override Priority
The PWM fault, current-limit and output override
priorities do not work correctly.
PWM Jitter
The PWM output may exhibit an occasional jitter
proportional to the operating speed of the
dsPIC30F1010/202X device.
ADC Global Software Trigger
The Global Software Trigger bit (GSWTRG in the
ADCON register) is not reset unless the PxRDY
bits in the ADSTAT register are reset.
ADC Sample and Hold Timing
The resolution of the PWM to ADC sample and
hold trigger timing is 41.6 ns instead of the 8 ns
specified in the device data sheet.
Individual ADC Interrupts for the ADC pin pairs do
not work.
The maximum conversion rate for the ADC module
is 1.5 Msps.
DS80391A-page 1

Related parts for DM300023

DM300023 Summary of contents

Page 1

... The output window will show a successful connection to the device specified in Configure>Select Device. The errata described in this section will be addressed in future revisions of silicon. © 2008 Microchip Technology Inc. dsPIC30F1010/202X Silicon Errata Summary The following list summarizes the errata described in this document: 1 ...

Page 2

... Stop bit instead of the second one. 37. SPI Module The SPIxCON1 DISSCK bit does not influence port functionality Module The BCL bit in I2CSTAT can be cleared only with 16-bit operation and can be corrupted with 1-bit or 8-bit operations on I2CSTAT. © 2008 Microchip Technology Inc. ...

Page 3

... C module is configured for 10-bit slave with an address of 0x102, the I2CxRCV register content for the lower address byte is 0x01 rather than 0x02. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 42. UART (FIFO Error) Under certain circumstances, the PERR and FERR error bits may not be correct for all bytes in the receive FIFO ...

Page 4

... This includes setting the PORTx and TRISx registers correctly, which correspond to the PWMxH and PWMxL pins. Event Trigger and Individual Trigger © 2008 Microchip Technology Inc. ...

Page 5

... PWM state will be exhibited for all duty cycle values. EQUATION 1: PWMxH = (OVRDAT<1>) AND (CLDAT<1>) AND (FLTDAT<1> AND 0 AND PWMxL = (OVRDAT<0>) AND (CLDAT<0>) AND (FLTDAT<0> AND 1 AND © 2008 Microchip Technology Inc. dsPIC30F1010/202X 6. Module: PWM Override Priority The “dsPIC30F1010/202X ...

Page 6

... In an interrupt based approach, the PxRDY bits get set when the conversion is complete. This bit must be cleared in the ADC Interrupt Service Routine in order to enable future interrupts. Trigger bits in the ADCPCx © 2008 Microchip Technology Inc. ...

Page 7

... ADC module is 2.0 Msps. The ADC module on the dsPIC30F1010/202X Rev. A3 silicon has a maximum conversion rate of 1.5 Msps. Work around None. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 12. Module: Current Reset Mode Setting the XPRES bit in the PWMCONx register should enable a current-limit source to reset the PWM period in Independent Time Base mode ...

Page 8

... If FRMDLY = 0, no work around is needed. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. © 2008 Microchip Technology Inc. of the frame ...

Page 9

... The OERR bit may also be set. After reading the UART receive buffer, UxRXREG, four times to clear the FIFO, clear both the OERR and UxRXIF bits in software. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 21. Module: UART Module UART receptions may be corrupted if the Baud Rate Generator (BRGH) is set up for 4x mode (BRGH = 1) ...

Page 10

... I2CxTRN register. In future silicon revisions, the D_A bit will get set on a slave write to I2CxTRN. Work around Use the D_A status bit only for determining slave reception status and not slave transmission status. © 2008 Microchip Technology Inc. ...

Page 11

... Write 1st password mov.b w1, [w4] ; Write 2nd password mov.b w2, [w4] ; Write OSWEN bit return © 2008 Microchip Technology Inc. dsPIC30F1010/202X FIGURE 1: drops below DD +5V *Any commercially available BOR circuit can be used in this configuration. Refer to the BOR circuit manufacturer’s data sheet for exact circuit configuration ...

Page 12

... Master and the Slave enter into Read mode and both of them transmit the data. The resultant data will be the ANDing of the two transmissions. Work around 2 In all I C devices, the addresses as well as bits A10 and A9 should be different. © 2008 Microchip Technology Inc. ...

Page 13

... However, the acknowledges for both address bytes. Work around None. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 42. Module: UART (FIFO Error Flags) Under certain circumstances, the PERR and FERR error bits may not be correct for all bytes in the receive FIFO. This has only been observed addresses ...

Page 14

... APPENDIX A: REVISION HISTORY Revision A (8/2008) Initial release of this document. DS80391A-page 14 © 2008 Microchip Technology Inc. ...

Page 15

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 16

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

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