LMK03200EVAL National Semiconductor, LMK03200EVAL Datasheet - Page 21

• Manufacturer Part Number: LMK03200EVAL
• Description: BOARD EVALUATION LMK03200
• Manufacturer: National Semiconductor

Specifications of LMK03200EVAL

• Main Purpose: Timing, Clock Conditioner
• Embedded: No
• Utilized Ic / Part: LMK03200
• Primary Attributes: 3 LVDS & 5 LVPECL Outputs, Integrated PLL & VCO
• Secondary Attributes: 3.15 V ~ 3.45 V Supply
• Silicon Manufacturer: National
• Silicon Core Number: LMK03200
• Kit Application Type: Clock & Timing
• Application Sub Type: Precision Clock Conditioner
• Kit Contents: Board, Cable
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The device now beings the frequency calibration routine,
when it completes the LD pin will go high since PLL_MUX was
programmed with the active high option for lock detect and
DLD_MODE2 = 1. When the LD pin goes high, or after 2 ms
have passed (the time for frequency calibration routine to
complete), step 2 is executed. Note that VCO_DIV = 0 was
not programmed to select VCO Divider since that is the de-
fault mode.
At this time the clock output frequency will be half the final
value because VCO_DIV = 2. If VCO_DIV was = 3, the clock
output frequencies would be a third the final value, etc.
Step 2
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When R7 is updated to bypass the VCO divider the PLL will
loose lock until R15 can be updated again with the updated
PLL_N divider value.
Once the LD pin goes high again, the clock outputs will be
locked at 614.4 MHz and 307.2 MHz.
Program Register 0
DLD_MODE2 = 0 (Digital lock detect is normal)
0_DELAY_MODE = 1 (active 0-delay mode so that
programming R15 won't start frequency calibration
routine)
CLKout0_EN = 1 (keep same programming)
CLKout0_MUX = 0 (keep same programming)
Program Register 7
VCO_MUX = 2 (bypass VCO divider)
Program Register 15 (VCO Frequency = 1228.8 MHz)
PLL_N = 40 (VCO_DIV bypassed, must update PLL_N)
Program Register 0
0_DELAY_MODE = 0
CLKout0_EN = 1 (keep same programming)
CLKout0_MUX = 0 (keep same programming)
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