STEVAL-ISQ002V1 STMicroelectronics, STEVAL-ISQ002V1 Datasheet - Page 114
STEVAL-ISQ002V1
Manufacturer Part Number
STEVAL-ISQ002V1
Description
BOARD EVAL BASED ON ST72264G1
Manufacturer
STMicroelectronics
Specifications of STEVAL-ISQ002V1
Main Purpose
Interface, PMBus
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F264
Primary Attributes
The PMBus™ Interface Using the ST7 I2C Peripheral
Secondary Attributes
Firmware in C Language
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6423
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ST72260Gx, ST72262Gx, ST72264Gx
I
I
Read / Write
Reset Value: 0000 0000 (00h)
7-bit Addressing Mode
Bit 7:1 = ADD[7:1] Interface address.
These bits define the I
face. They are not cleared when the interface is
disabled (PE=0).
Bit 0 = ADD0 Address direction bit.
This bit is don’t care, the interface acknowledges
either 0 or 1. It is not cleared when the interface is
disabled (PE=0).
Note: Address 01h is always ignored.
10-bit Addressing Mode
Bit 7:0 = ADD[7:0] Interface address.
These are the least significant bits of the I
address of the interface. They are not cleared
when the interface is disabled (PE=0).
114/172
2
2
ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0
C BUS INTERFACE (Cont’d)
C OWN ADDRESS REGISTER (OAR1)
7
2
C bus address of the inter-
2
C bus
0
I
Read / Write
Reset Value: 0100 0000 (40h)
Bit 7:6 = FR[1:0] Frequency bits.
These bits are set by software only when the inter-
face is disabled (PE=0). To configure the interface
to I
sponding to the microcontroller frequency F
Bit 5:3 = Reserved
Bit 2:1 = ADD[9:8] Interface address.
These are the most significant bits of the I
address of the interface (10-bit mode only). They
are not cleared when the interface is disabled
(PE=0).
Bit 0 = Reserved.
2
C OWN ADDRESS REGISTER (OAR2)
FR1
7
2
C specified delays select the value corre-
FR0
6 to 8 MHz
< 6 MHz
f
CPU
0
0
0
FR1
0
0
ADD9 ADD8
FR0
2
CPU
0
1
C bus
0
0
.
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