CDB42528 Cirrus Logic Inc, CDB42528 Datasheet - Page 56

• Manufacturer Part Number: CDB42528
• Description: BOARD EVAL FOR CS42528/CS49300
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42528

• Main Purpose: Audio, Audio Processing
• Embedded: Yes, DSP
• Utilized Ic / Part: CS49300, CS42528
• Primary Attributes: 8 Single-Ended Analog Inputs and Outputs, 4 S/PDIF Inputs and 2 S/PDIF Outputs
• Secondary Attributes: Parallel, RS422, RS232, UDSP Interfaces
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1503

56
WRITE_*(HW_CONFIG_MSG,
DOWNLOAD FILE SIZE)
SUCCESS_RECEIVED,
RESET(LOW)
READ_*(MESSAGE)
READ_*(MESSAGE)
WRITE_*(.LD FILE,
WAIT 5 MS
BOOT_SUCCESS?
HOUTRDY LOW?
HOUTRDY LOW?
WRITE_*(BOOT_
READ HOSTCTL
READ HOSTCTL
HW_MSG_SIZE)
MESSAGE ==
BOOTSTART?
MESSAGE ==
MSG-SIZE)
REGISTER
REGISTER
(NOTE 5)
Y
(NOTE 4)
Y
Y
Y
(NOTE 1)
N
Figure 34. Typical Parallel Boot and Download Procedure
N
N
N
RESET(HIGH)
TIMEOUT AFTER
TIMEOUT AFTER
WRITE_*(SW_CONFIG_MSG,
20MS
EXIT(ERROR)
20MS
EXIT(ERROR)
(NOTE 3)
(NOTE 3)
(NOTE 5)
(NOTE 2)
SW_MSG_SIZE)
Notes: 1. RESET must be held LOW for
WAIT
2. It should be noted that mode
3. Time-out values reflect worst
4. 5 ms is typical but this time is
5. Hardware configuration
DOWNLOAD COMPLETE
WRITE_*(KICKSTART,
500 µs
t
pins are used to configure the
CS493XX serial communication
mode. These mode pins are
latched internally on the rising
edge of reset. The pins can be
set dynamically by a
microprocessor or can be
statically pulled HIGH or LOW. If
these pins are driven
dynamically, setup and hold
times must be satisfied as stated
in the CS493XX Data Sheet.
More information about the
function of the mode pins can be
found in the CS493XX Data
Sheet and in
on page
case response time for the
CS493XX. The values shown
may be used for the host’s time-
out control loop.
application code specific and
may be as high as 10 ms. Wait
times should be verified by the
designer.
messages are covered in
Section 6, “Control” on page
Application configuration
messages are covered in each
application code user’s manual.
rstl
.
(NOTE 5)
CS49300 Family DSP
MSG_SIZE)
36.
Section 6, “Control”
WRITE_*(DOWNLOAD_
BOOT, MSG_SIZE)
36.
DS339F7