Z8FMC160100KIT Zilog, Z8FMC160100KIT Datasheet - Page 201
Z8FMC160100KIT
Manufacturer Part Number
Z8FMC160100KIT
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KIT.pdf
(20 pages)
Specifications of Z8FMC160100KIT
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphic User Interface
Processor To Be Evaluated
Z8FMC16100
Data Bus Width
8 bit
Interface Type
USB
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3639
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Table 99. I2CSTATE_H (Continued)
Table 100. I2CSTATE_L
PS024613-0910
State
I2CSTATE_H
0000–0100
0110–0111
0101
1000–1111
State
Encoding
1011
1100
1101
1110
1111
Substate
I2CSTATE_L
0000
0000
0000
0001
0111
0110
0101
0100
0011
0010
0001
0000
1000
State Name
Slave Receive Addr2
Master Transmit Data
Master Receive Data
Master Transmit Addr1 Master sending first address byte (7- and 10-bit addressing)
Master Transmit Addr2 Master sending second address byte (10-bit addressing)
Substate Name
—
—
Master Start
Master Restart
send/receive bit 7
send/receive bit 6
send/receive bit 5
send/receive bit 4
send/receive bit 3
send/receive bit 2
send/receive bit 1
send/receive bit 0
send/receive
Acknowledge
State Description
Slave Receiving second address byte (10-bit addressing)
9 substates, one for each address bit and one for the
Acknowledge.
9 substates, one for each data bit and one for the Acknowledge.
9 substates, one for each data bit and one for the Acknowledge.
9 substates, one for each address bit and one for the
Acknowledge.
9 substates, one for each address bit and one for the
Acknowledge.
State Description
There are no substates for these I2CSTATE_H
There are no substates for these I2CSTATE_H
Sending/Receiving most significant bit
Sending/Receiving least significant bit
values.
values.
Initiating a new transaction
Master is ending one transaction and starting a
new one without letting the bus go idle.
Sending/Receiving Acknowledge
Z8FMC16100 Series Flash MCU
Product Specification
I
2
C State Register
189
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