Z8FMC160100KIT Zilog, Z8FMC160100KIT Datasheet - Page 172
Z8FMC160100KIT
Manufacturer Part Number
Z8FMC160100KIT
Description
KIT DEV FOR Z8 ENCORE Z8FMC16100
Manufacturer
Zilog
Series
Z8 Encore! MC™r
Datasheets
1.Z8FMC160100KIT.pdf
(7 pages)
2.Z8FMC160100KIT.pdf
(383 pages)
3.Z8FMC160100KIT.pdf
(20 pages)
Specifications of Z8FMC160100KIT
Main Purpose
Power Management, Motor Control
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
Z8FMC16100
Primary Attributes
3-Ph DC Motors
Secondary Attributes
Graphic User Interface
Processor To Be Evaluated
Z8FMC16100
Data Bus Width
8 bit
Interface Type
USB
For Use With
269-4664 - KIT ACC OPTO-ISO USB SMART CABLE269-4661 - KIT ACC ETHERNET SMART CABLE269-4539 - KIT ACCESSORY USB SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3639
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Table 89. SPI Baud Rate High Byte Register (SPIBRH)
Table 90. SPI Baud Rate Low Byte Register (SPIBRL)
PS024613-0910
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
SPI Baud Rate High and Low Byte Registers
7
7
The SPI Baud Rate High and Low Byte registers combine to form a 16-bit reload value
(BRG[15:0]) for the SPI Baud Rate Generator. The SPI baud rate is calculated using the
following equation:
Minimum baud rate is obtained by setting BRG[15:0] to
of (2 X 65536 = 131072).
BRH = SPI Baud Rate High Byte
Most significant byte (BRG[15:8]) of the SPI Baud Rate Generator’s reload value.
BRL = SPI Baud Rate Low Byte
Least significant byte (BRG[7:0]) of the SPI Baud Rate Generator’s reload value.
SPI Baud Rate (bps)
6
6
5
5
=
System Clock Frequency (Hz)
2 x BRG[15:0]
4
4
F66H
F67H
BRH
FFH
R/W
BRL
FFH
R/W
3
3
SPI Baud Rate High and Low Byte Registers
Z8FMC16100 Series Flash MCU
0000h
2
2
Product Specification
for a clock divisor value
1
1
0
0
160
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