LTM8032IV#PBF Linear Technology, LTM8032IV#PBF Datasheet - Page 13

• Manufacturer Part Number: LTM8032IV#PBF
• Description: IC BUCK ADJ 2A 71LGA
• Manufacturer: Linear Technology
• Series: µModuler
• Type: Point of Load (POL) Non-Isolatedr

Specifications of LTM8032IV#PBF

• Design Resources: LTM8032 Spice Model
• Output: 0.8 ~ 10 V
• Number Of Outputs: 1
• Power (watts): 20W
• Mounting Type: Surface Mount
• Voltage - Input: 3.6 ~ 36 V
• Package / Case: 71-LGA
• 1st Output: 0.8 ~ 10 VDC @ 2A
• Size / Dimension: 0.59" L x 0.35" W x 0.11" H (15mm x 9mm x 2.8mm)
• Power (watts) - Rated: 20W
• Operating Temperature: -40°C ~ 125°C
• Approvals: EN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -

APPLICATIONS INFORMATION
6. Use vias to connect the GND copper area to the board’s
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8032. However, these capacitors
can cause problems if the LTM8032 is plugged into a live
or fast rising or falling supply (see Linear Technology
Application Note 88 for a complete discussion). The low
loss ceramic capacitor combined with stray inductance in
series with the power source forms an under-damped tank
circuit, and the voltage at the V
ring to twice the nominal input voltage, possibly exceed-
ing the LTM8032’s rating and damaging the part. A similar
phenomenon can occur inside the LTM8032 module, at the
output of the integrated EMI fi lter, with the same potential
of damaging the part.
Figure 4. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
internal ground plane. Liberally distribute these GND vias
to provide both a good ground connection and thermal
path to the internal planes of the printed circuit board.
C
OUT
V
GND
OUT
GND
IN
CAPACITOR
OPTIONAL
pin of the LTM8032 can
AUX
FIN
C
IN
BIAS
FIN
SYNC
RUN/SS
V
IN
8032 F04
If the input supply is poorly controlled or the user will
be plugging the LTM8032 into an energized supply, the
input network should be designed to prevent this over-
shoot. Figure 5 shows the waveforms that result when
an LTM8032 circuit is connected to a 24V supply through
six feet of 24-gauge twisted pair. The fi rst plot (5a) is the
response with a 2.2μF ceramic capacitor at the input. The
input voltage rings as high as 35V and the input current
peaks at 20A. One method of damping the tank circuit
is to add another capacitor with a series resistor to the
circuit. An alternative solution is shown in Figure 5b. A
0.7Ω resistor is added in series with the input to eliminate
the voltage overshoot (it also reduces the peak input cur-
rent). A 0.1μF capacitor improves high frequency fi ltering.
For high input voltages its impact on effi ciency is minor,
reducing effi ciency less than one-half percent for a 5V
output at full load operating from 24V. By far the most
popular method of controlling overshoot is shown in Figure
5c, where an aluminum electrolytic capacitor has been
connected to FIN. This capacitor’s high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple fi ltering and can slightly improve the effi ciency of
the circuit, though it is likely to be the largest component
in the circuit. Figure 5c shows the capacitor added to the
V
FIN terminals can improve the LTM8032’s EMI fi ltering as
well as guard against overshoots caused by the Q of the
integrated fi lter.
Thermal Considerations
The LTM8032 output current may need to be derated if it
is required to operate in a high ambient temperature or
deliver a large amount of continuous power. The amount of
current derating is dependent upon the input voltage, out-
put power and ambient temperature. The derating curves
given in the Typical Performance Characteristics section
can be used as a guide. These curves were generated by a
LTM8032 mounted to a 36cm
board. Boards of other sizes and layer count can exhibit
different thermal behavior, so it is incumbent upon the user
to verify proper operation over the intended system’s line,
load and environmental operating conditions.
IN
terminals, but placing the electrolytic capacitor at the
2
4-layer FR4 printed circuit
LTM8032
13
8032fc