MT9VDVF6472Y-335D4 Micron Technology Inc, MT9VDVF6472Y-335D4 Datasheet - Page 14

• Manufacturer Part Number: MT9VDVF6472Y-335D4
• Description: MODULE DDR 512MB 184-DIMM VLP
• Manufacturer: Micron Technology Inc

Specifications of MT9VDVF6472Y-335D4

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 184RDIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 512Mb
• Access Time (max): 700ps
• Package Type: VLP DIMM
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.575A
• Number Of Elements: 9
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 184
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 5:
Operating Mode
Extended Mode Register
PDF: 09005aef81cf6969/Source: 09005aef81cf67b0
DVF9C32_64x72_2.fm - Rev. A 8/05 EN
CAS Latency Diagram
The normal operating mode is selected by issuing a MODE REGISTER SET command
with bits A7–A12 each set to zero, and bits A0–A6 set to the desired values. A DLL reset is
initiated by issuing a MODE REGISTER SET command with bits A7 and A9–A12 each set
to zero, bit A8 set to one, and bits A0–A6 set to the desired values. Although not required
by the Micron device, JEDEC specifications recommend when a LOAD MODE REGISTER
command is issued to reset the DLL, it should always be followed by a LOAD MODE
REGISTER command to select normal operating mode.
All other combinations of values for A7–A12 are reserved for future use and/or test
modes. Test modes and reserved states should not be used because unknown operation
or incompatibility with future versions may result.
The extended mode register controls functions beyond those controlled by the mode
register; these additional functions are DLL enable/disable and output drive strength.
These functions are controlled via the bits shown in Figure 6, "Extended Mode Register
Definition Diagram," on page 15. The extended mode register is programmed via the
LOAD MODE REGISTER command to the mode register (with BA0 = 1 and BA1 = 0) and
will retain the stored information until it is programmed again or the device loses power.
The enabling of the DLL should always be followed by a LOAD MODE REGISTER com-
mand to the mode register (BA0/BA1 both LOW) to reset the DLL.
COMMAND
COMMAND
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
READ
READ
Burst Length = 4 in the cases shown
Shown with nominal t AC, t DQSCK, and t DQSQ
T0
T0
256MB, 512MB: (x72, SR) 184-Pin DDR VLP RDIMM
CL = 2
TRANSITIONING DATA
CL = 2.5
14
NOP
NOP
T1
T1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
NOP
NOP
T2
T2n
T2n
DON’T CARE
Extended Mode Register
T3
NOP
NOP
T3
©2004 Micron Technology, Inc. All rights reserved.
T3n
T3n