MT18VDVF12872DG-40BD4 Micron Technology Inc, MT18VDVF12872DG-40BD4 Datasheet - Page 24

• Manufacturer Part Number: MT18VDVF12872DG-40BD4
• Description: MODULE DDR 1GB 184-DIMM VLP
• Manufacturer: Micron Technology Inc

Specifications of MT18VDVF12872DG-40BD4

• Memory Type: DDR SDRAM
• Memory Size: 1GB
• Speed: 400MT/s
• Package / Case: 184-DIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 7:
PDF: 09005aef81c73825/Source: 09005aef81c73837
DVF18C64_128x72D_2.fm - Rev. A 8/05 EN
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
Derating Data Valid Window (
50/50
3.750
2.500
NA
49.5/50.5
3.700
-335
-262/-26A/-265 @ t CK = 10ns
-262/-26A/-265 @ t CK = 7.5ns
32. Any positive glitch in the nominal voltage must be less than 1/3 of the clock and not
33. Normal Output Drive Curves:
34. The voltage levels used are derived from a minimum V
2.463
more than +400mV or 2.9V max, whichever is less. Any negative glitch must be less
than 1/3 of the clock cycle and not exceed either -300mV or 2.2V min, whichever is
more positive. However, the DC average cannot be below 2.3V minimum.
load. In practice, the voltage levels obtained from a properly terminated bus will pro-
vide significantly different voltage values.
b. The variation in driver pull-down current within nominal limits of voltage and
d. The variation in driver pull-up current within nominal limits of voltage and tem-
a. The full variation in driver pull-down current from minimum to maximum pro-
c. The full variation in driver pull-up current from minimum to maximum process,
e. The full variation in the ratio of the maximum to minimum pull-up and pull-
f. The full variation in the ratio of the nominal pull-up to pull-down current should
49/51
3.650
cess, temperature and voltage will lie within the outer bounding lines of the V-I
curve of Figure 8, "Pull-Down," on page 25.
temperature is expected, but not guaranteed, to lie within the inner bounding
lines of the V-I curve of Figure 8, "Pull-Down," on page 25.
temperature and voltage will lie within the outer bounding lines of the V-I curve
of Figure 9, "Pull-Up," on page 25.
perature is expected, but not guaranteed, to lie within the inner bounding lines
of the V-I curve of Figure 9, "Pull-Up," on page 25.
down current should be between 0.71 and 1.4, for device drain-to-source volt-
ages from 0.1V to 1.0V, and at the same voltage and temperature.
be unity ±10 percent, for device drain-to-source voltages from 0.1V to 1.0V.
2.425
48.5/52.5
3.600
2.388
t
QH -
48/52
3.550
512MB, 1GB: (x72, DR) 184-Pin DDR VLP RDIMM
2.350
Clock Duty Cycle
t
DQSQ)
24
47.5/53.5
3.500
2.313
Micron Technology, Inc., reserves the right to change products or specifications without notice.
3.450
47/53
2.275
46.5/54.5
3.400
2.238
©2003, 2004, 2005 Micron Technology, Inc. All rights reserved.
DD
3.350
46/54
2.200
level and the referenced test
45.5/55.5
3.300
2.163
3.250
45/55
2.125
Notes